upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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205 lines
5.7 KiB
205 lines
5.7 KiB
/*
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* Copyright (C) 2008 Freescale Semiconductor, Inc.
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* Dave Liu <daveliu@freescale.com>
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* port from libata of linux kernel
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef __LIBATA_H__
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#define __LIBATA_H__
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#include <common.h>
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/* command
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*/
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enum ata_cmd {
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/* non-NCQ command */
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ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
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ATA_CMD_FLUSH_CACHE = 0xE7,
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ATA_CMD_FLUSH_CACHE_EXT = 0xEA,
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ATA_CMD_ID_ATA = 0xEC,
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ATA_CMD_ID_ATAPI = 0xA1,
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ATA_CMD_READ_DMA = 0xC8,
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ATA_CMD_READ_DMA_EXT = 0x25,
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ATA_CMD_WRITE_DMA = 0xCA,
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ATA_CMD_WRITE_DMA_EXT = 0x35,
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ATA_CMD_PIO_READ = 0x20,
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ATA_CMD_PIO_READ_EXT = 0x24,
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ATA_CMD_PIO_WRITE = 0x30,
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ATA_CMD_PIO_WRITE_EXT = 0x34,
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ATA_CMD_SET_FEATURES = 0xEF,
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/* NCQ command */
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ATA_CMD_READ_FPDMA_QUEUED = 0x60,
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ATA_CMD_WRITE_FPDMA_QUEUED = 0x61,
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};
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/* SETFEATURES stuff
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*/
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enum ata_set_features {
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/* SETFEATURES stuff */
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SETFEATURES_XFER = 0x03,
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XFER_UDMA_7 = 0x47,
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XFER_UDMA_6 = 0x46,
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XFER_UDMA_5 = 0x45,
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XFER_UDMA_4 = 0x44,
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XFER_UDMA_3 = 0x43,
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XFER_UDMA_2 = 0x42,
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XFER_UDMA_1 = 0x41,
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XFER_UDMA_0 = 0x40,
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XFER_MW_DMA_4 = 0x24, /* CFA only */
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XFER_MW_DMA_3 = 0x23, /* CFA only */
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XFER_MW_DMA_2 = 0x22,
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XFER_MW_DMA_1 = 0x21,
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XFER_MW_DMA_0 = 0x20,
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XFER_PIO_6 = 0x0E, /* CFA only */
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XFER_PIO_5 = 0x0D, /* CFA only */
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XFER_PIO_4 = 0x0C,
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XFER_PIO_3 = 0x0B,
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XFER_PIO_2 = 0x0A,
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XFER_PIO_1 = 0x09,
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XFER_PIO_0 = 0x08,
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XFER_PIO_SLOW = 0x00,
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SETFEATURES_WC_ON = 0x02, /* Enable write cache */
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SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
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SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
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};
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enum ata_protocol {
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ATA_PROT_UNKNOWN, /* unknown */
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ATA_PROT_NODATA, /* no data */
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ATA_PROT_PIO, /* PIO data xfer */
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ATA_PROT_DMA, /* DMA */
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ATA_PROT_NCQ, /* NCQ */
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ATA_PROT_ATAPI, /* packet command, PIO data xfer */
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ATA_PROT_ATAPI_NODATA, /* packet command, no data */
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ATA_PROT_ATAPI_DMA, /* packet command, DMA */
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};
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enum ata_dev_typed {
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ATA_DEV_ATA, /* ATA device */
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ATA_DEV_ATAPI, /* ATAPI device */
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ATA_DEV_PMP, /* Port Multiplier Port */
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ATA_DEV_UNKNOWN, /* unknown */
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};
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enum {
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ATA_SECT_SIZE = 512,
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ATA_MAX_SECTORS_128 = 128,
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ATA_MAX_SECTORS = 256,
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ATA_MAX_SECTORS_LBA48 = 65535,
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/* bits in ATA command block registers */
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ATA_HOB = (1 << 7), /* LBA48 selector */
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ATA_NIEN = (1 << 1), /* disable-irq flag */
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ATA_LBA = (1 << 6), /* LBA28 selector */
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ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
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ATA_BUSY = (1 << 7), /* BSY status bit */
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ATA_DRDY = (1 << 6), /* device ready */
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ATA_DF = (1 << 5), /* device fault */
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ATA_DRQ = (1 << 3), /* data request i/o */
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ATA_ERR = (1 << 0), /* have an error */
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ATA_SRST = (1 << 2), /* software reset */
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ATA_ICRC = (1 << 7), /* interface CRC error */
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ATA_UNC = (1 << 6), /* uncorrectable media error */
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ATA_IDNF = (1 << 4), /* ID not found */
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ATA_ABORTED = (1 << 2), /* command aborted */
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ATA_ID_WORDS = 256,
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ATA_ID_SERNO = 10,
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ATA_ID_FW_REV = 23,
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ATA_ID_PROD = 27,
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ATA_ID_FIELD_VALID = 53,
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ATA_ID_LBA_SECTORS = 60,
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ATA_ID_MWDMA_MODES = 63,
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ATA_ID_PIO_MODES = 64,
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ATA_ID_QUEUE_DEPTH = 75,
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ATA_ID_SATA_CAP = 76,
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ATA_ID_SATA_FEATURES = 78,
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ATA_ID_SATA_FEATURES_EN = 79,
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ATA_ID_MAJOR_VER = 80,
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ATA_ID_MINOR_VER = 81,
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ATA_ID_UDMA_MODES = 88,
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ATA_ID_LBA48_SECTORS = 100,
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ATA_ID_SERNO_LEN = 20,
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ATA_ID_FW_REV_LEN = 8,
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ATA_ID_PROD_LEN = 40,
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ATA_PIO3 = (1 << 0),
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ATA_PIO4 = ATA_PIO3 | (1 << 1),
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ATA_UDMA0 = (1 << 0),
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ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
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ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
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ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
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ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
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ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
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ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
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ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
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};
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#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
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#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
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#define ata_id_has_fua(id) ((id)[84] & (1 << 6))
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#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
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#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
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#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
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#define ata_id_has_wcache(id) ((id)[82] & (1 << 5))
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#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
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#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
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#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
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#define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
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#define ata_id_u32(id,n) \
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(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
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#define ata_id_u64(id,n) \
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( ((u64) (id)[(n) + 3] << 48) | \
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((u64) (id)[(n) + 2] << 32) | \
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((u64) (id)[(n) + 1] << 16) | \
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((u64) (id)[(n) + 0]) )
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static inline unsigned int ata_id_major_version(const u16 *id)
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{
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unsigned int mver;
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if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
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return 0;
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for (mver = 14; mver >= 1; mver--)
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if (id[ATA_ID_MAJOR_VER] & (1 << mver))
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break;
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return mver;
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}
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static inline int ata_id_is_sata(const u16 *id)
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{
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return ata_id_major_version(id) >= 5 && id[93] == 0;
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}
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u64 ata_id_n_sectors(u16 *id);
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u32 ata_dev_classify(u32 sig);
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void ata_id_c_string(const u16 *id, unsigned char *s,
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unsigned int ofs, unsigned int len);
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void ata_dump_id(u16 *id);
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void ata_swap_buf_le16(u16 *buf, unsigned int buf_words);
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#endif /* __LIBATA_H__ */
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