upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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124 lines
2.4 KiB
124 lines
2.4 KiB
/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <libfdt.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/armv8/mmu.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* On ARMv8, MBus is not configured in U-Boot. To enable compilation
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* of the already implemented drivers, lets add a dummy version of
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* this function so that linking does not fail.
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*/
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const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
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{
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return NULL;
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}
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/* DRAM init code ... */
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static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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{
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int offset;
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offset = fdt_path_offset(fdt, "/memory");
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if (offset < 0)
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return NULL;
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return fdt_getprop(fdt, offset, "reg", lenp);
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}
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int dram_init(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, len;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 0 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return -EINVAL;
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}
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val = get_memory_reg_prop(fdt, &len);
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if (len / sizeof(*val) < ac + sc)
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return -EINVAL;
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val += ac;
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gd->ram_size = fdtdec_get_number(val, sc);
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debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
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return 0;
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}
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void dram_init_banksize(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, cells, len, i;
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val = get_memory_reg_prop(fdt, &len);
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if (len < 0)
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return;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return;
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}
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cells = ac + sc;
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len /= sizeof(*val);
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for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
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i++, len -= cells) {
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gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
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val += ac;
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gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
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val += sc;
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debug("DRAM bank %d: start = %08lx, size = %08lx\n",
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i, (unsigned long)gd->bd->bi_dram[i].start,
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(unsigned long)gd->bd->bi_dram[i].size);
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}
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}
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int arch_cpu_init(void)
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{
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/* Nothing to do (yet) */
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return 0;
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}
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int arch_early_init_r(void)
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{
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struct udevice *dev;
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int ret;
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/* Call the comphy code via the MISC uclass driver */
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ret = uclass_get_device(UCLASS_MISC, 0, &dev);
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if (ret) {
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debug("COMPHY init failed: %d\n", ret);
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return -ENODEV;
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}
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/* Cause the SATA device to do its early init */
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uclass_first_device(UCLASS_AHCI, &dev);
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return 0;
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}
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