upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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130 lines
2.8 KiB
130 lines
2.8 KiB
/*
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*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <netdev.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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rcm_t *rcm = (rcm_t *) (MMAP_RCM);
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udelay(1000);
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out_8(&rcm->rcr, RCM_RCR_FRCRSTOUT);
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udelay(10000);
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setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
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/* we don't return! */
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return 0;
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};
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int checkcpu(void)
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{
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ccm_t *ccm = (ccm_t *) MMAP_CCM;
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u16 msk;
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u16 id = 0;
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u8 ver;
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puts("CPU: ");
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msk = (in_be16(&ccm->cir) >> 6);
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ver = (in_be16(&ccm->cir) & 0x003f);
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switch (msk) {
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case 0x48:
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id = 54455;
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break;
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case 0x49:
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id = 54454;
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break;
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case 0x4a:
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id = 54453;
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break;
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case 0x4b:
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id = 54452;
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break;
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case 0x4d:
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id = 54451;
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break;
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case 0x4f:
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id = 54450;
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break;
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case 0x9F:
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id = 54410;
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break;
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case 0xA0:
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id = 54415;
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break;
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case 0xA1:
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id = 54416;
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break;
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case 0xA2:
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id = 54417;
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break;
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case 0xA3:
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id = 54418;
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break;
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}
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if (id) {
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char buf1[32], buf2[32], buf3[32];
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printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
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ver);
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printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
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strmhz(buf1, gd->cpu_clk),
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strmhz(buf2, gd->bus_clk),
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strmhz(buf3, gd->flb_clk));
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#ifdef CONFIG_PCI
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printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
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strmhz(buf1, gd->pci_clk),
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strmhz(buf2, gd->inp_clk),
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strmhz(buf3, gd->vco_clk));
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#else
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printf(" INP CLK %s MHz VCO CLK %s MHz\n",
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strmhz(buf1, gd->inp_clk),
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strmhz(buf2, gd->vco_clk));
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#endif
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}
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return 0;
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}
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#if defined(CONFIG_MCFFEC)
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/* Default initializations for MCFFEC controllers. To override,
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* create a board-specific function called:
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* int board_eth_init(bd_t *bis)
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*/
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int cpu_eth_init(bd_t *bis)
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{
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return mcffec_initialize(bis);
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}
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#endif
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