upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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514 lines
10 KiB
514 lines
10 KiB
/*
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* SPI flash operations
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*
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* Copyright (C) 2008 Atmel Corporation
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* Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
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* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi.h>
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#include <spi_flash.h>
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#include <watchdog.h>
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#include "sf_internal.h"
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static void spi_flash_addr(u32 addr, u8 *cmd)
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{
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/* cmd[0] is actual command */
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cmd[1] = addr >> 16;
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cmd[2] = addr >> 8;
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cmd[3] = addr >> 0;
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}
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int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
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{
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int ret;
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u8 cmd;
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cmd = CMD_READ_STATUS;
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ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
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if (ret < 0) {
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debug("SF: fail to read status register\n");
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return ret;
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}
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return 0;
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}
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int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
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{
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u8 cmd;
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int ret;
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cmd = CMD_WRITE_STATUS;
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ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
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if (ret < 0) {
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debug("SF: fail to write status register\n");
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return ret;
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}
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return 0;
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}
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#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
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int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
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{
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int ret;
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u8 cmd;
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cmd = CMD_READ_CONFIG;
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ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
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if (ret < 0) {
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debug("SF: fail to read config register\n");
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return ret;
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}
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return 0;
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}
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int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
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{
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u8 data[2];
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u8 cmd;
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int ret;
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ret = spi_flash_cmd_read_status(flash, &data[0]);
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if (ret < 0)
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return ret;
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cmd = CMD_WRITE_STATUS;
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data[1] = wc;
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ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
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if (ret) {
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debug("SF: fail to write config register\n");
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return ret;
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}
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return 0;
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}
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#endif
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#ifdef CONFIG_SPI_FLASH_BAR
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static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
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{
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u8 cmd;
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int ret;
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if (flash->bank_curr == bank_sel) {
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debug("SF: not require to enable bank%d\n", bank_sel);
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return 0;
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}
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cmd = flash->bank_write_cmd;
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ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
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if (ret < 0) {
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debug("SF: fail to write bank register\n");
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return ret;
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}
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flash->bank_curr = bank_sel;
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return 0;
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}
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static int spi_flash_bank(struct spi_flash *flash, u32 offset)
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{
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u8 bank_sel;
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int ret;
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bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
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ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
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if (ret) {
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debug("SF: fail to set bank%d\n", bank_sel);
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return ret;
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}
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return bank_sel;
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}
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#endif
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#ifdef CONFIG_SF_DUAL_FLASH
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static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
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{
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switch (flash->dual_flash) {
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case SF_DUAL_STACKED_FLASH:
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if (*addr >= (flash->size >> 1)) {
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*addr -= flash->size >> 1;
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flash->spi->flags |= SPI_XFER_U_PAGE;
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} else {
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flash->spi->flags &= ~SPI_XFER_U_PAGE;
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}
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break;
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case SF_DUAL_PARALLEL_FLASH:
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*addr >>= flash->shift;
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break;
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default:
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debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
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break;
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}
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}
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#endif
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int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
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{
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struct spi_slave *spi = flash->spi;
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unsigned long timebase;
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unsigned long flags = SPI_XFER_BEGIN;
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int ret;
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u8 status;
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u8 check_status = 0x0;
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u8 poll_bit = STATUS_WIP;
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u8 cmd = flash->poll_cmd;
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if (cmd == CMD_FLAG_STATUS) {
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poll_bit = STATUS_PEC;
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check_status = poll_bit;
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}
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#ifdef CONFIG_SF_DUAL_FLASH
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if (spi->flags & SPI_XFER_U_PAGE)
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flags |= SPI_XFER_U_PAGE;
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#endif
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ret = spi_xfer(spi, 8, &cmd, NULL, flags);
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if (ret) {
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debug("SF: fail to read %s status register\n",
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cmd == CMD_READ_STATUS ? "read" : "flag");
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return ret;
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}
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timebase = get_timer(0);
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do {
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WATCHDOG_RESET();
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ret = spi_xfer(spi, 8, NULL, &status, 0);
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if (ret)
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return -1;
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if ((status & poll_bit) == check_status)
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break;
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} while (get_timer(timebase) < timeout);
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spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
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if ((status & poll_bit) == check_status)
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return 0;
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/* Timed out */
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debug("SF: time out!\n");
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return -1;
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}
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int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
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size_t cmd_len, const void *buf, size_t buf_len)
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{
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struct spi_slave *spi = flash->spi;
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unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
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int ret;
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if (buf == NULL)
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timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: unable to claim SPI bus\n");
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return ret;
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}
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ret = spi_flash_cmd_write_enable(flash);
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if (ret < 0) {
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debug("SF: enabling write failed\n");
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return ret;
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}
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ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
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if (ret < 0) {
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debug("SF: write cmd failed\n");
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return ret;
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}
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ret = spi_flash_cmd_wait_ready(flash, timeout);
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if (ret < 0) {
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debug("SF: write %s timed out\n",
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timeout == SPI_FLASH_PROG_TIMEOUT ?
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"program" : "page erase");
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return ret;
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}
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spi_release_bus(spi);
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return ret;
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}
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int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
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{
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u32 erase_size, erase_addr;
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u8 cmd[SPI_FLASH_CMD_LEN];
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int ret = -1;
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erase_size = flash->erase_size;
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if (offset % erase_size || len % erase_size) {
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debug("SF: Erase offset/length not multiple of erase size\n");
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return -1;
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}
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cmd[0] = flash->erase_cmd;
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while (len) {
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erase_addr = offset;
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#ifdef CONFIG_SF_DUAL_FLASH
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if (flash->dual_flash > SF_SINGLE_FLASH)
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spi_flash_dual_flash(flash, &erase_addr);
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#endif
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#ifdef CONFIG_SPI_FLASH_BAR
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ret = spi_flash_bank(flash, erase_addr);
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if (ret < 0)
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return ret;
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#endif
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spi_flash_addr(erase_addr, cmd);
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debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
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cmd[2], cmd[3], erase_addr);
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ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
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if (ret < 0) {
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debug("SF: erase failed\n");
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break;
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}
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offset += erase_size;
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len -= erase_size;
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}
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return ret;
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}
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int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
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size_t len, const void *buf)
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{
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unsigned long byte_addr, page_size;
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u32 write_addr;
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size_t chunk_len, actual;
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u8 cmd[SPI_FLASH_CMD_LEN];
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int ret = -1;
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page_size = flash->page_size;
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cmd[0] = flash->write_cmd;
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for (actual = 0; actual < len; actual += chunk_len) {
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write_addr = offset;
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#ifdef CONFIG_SF_DUAL_FLASH
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if (flash->dual_flash > SF_SINGLE_FLASH)
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spi_flash_dual_flash(flash, &write_addr);
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#endif
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#ifdef CONFIG_SPI_FLASH_BAR
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ret = spi_flash_bank(flash, write_addr);
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if (ret < 0)
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return ret;
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#endif
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byte_addr = offset % page_size;
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chunk_len = min(len - actual, page_size - byte_addr);
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if (flash->spi->max_write_size)
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chunk_len = min(chunk_len, flash->spi->max_write_size);
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spi_flash_addr(write_addr, cmd);
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debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
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buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
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ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
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buf + actual, chunk_len);
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if (ret < 0) {
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debug("SF: write failed\n");
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break;
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}
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offset += chunk_len;
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}
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return ret;
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}
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int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
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size_t cmd_len, void *data, size_t data_len)
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{
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struct spi_slave *spi = flash->spi;
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int ret;
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: unable to claim SPI bus\n");
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return ret;
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}
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ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
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if (ret < 0) {
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debug("SF: read cmd failed\n");
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return ret;
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}
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spi_release_bus(spi);
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return ret;
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}
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int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
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size_t len, void *data)
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{
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u8 *cmd, cmdsz;
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u32 remain_len, read_len, read_addr;
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int bank_sel = 0;
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int ret = -1;
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/* Handle memory-mapped SPI */
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if (flash->memory_map) {
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: unable to claim SPI bus\n");
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return ret;
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}
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spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
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memcpy(data, flash->memory_map + offset, len);
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spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
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spi_release_bus(flash->spi);
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return 0;
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}
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cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
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cmd = malloc(cmdsz);
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memset(cmd, 0, cmdsz);
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cmd[0] = flash->read_cmd;
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while (len) {
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read_addr = offset;
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#ifdef CONFIG_SF_DUAL_FLASH
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if (flash->dual_flash > SF_SINGLE_FLASH)
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spi_flash_dual_flash(flash, &read_addr);
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#endif
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#ifdef CONFIG_SPI_FLASH_BAR
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bank_sel = spi_flash_bank(flash, read_addr);
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if (bank_sel < 0)
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return ret;
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#endif
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remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
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(bank_sel + 1)) - offset;
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if (len < remain_len)
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read_len = len;
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else
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read_len = remain_len;
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spi_flash_addr(read_addr, cmd);
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ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
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if (ret < 0) {
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debug("SF: read failed\n");
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break;
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}
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offset += read_len;
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len -= read_len;
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data += read_len;
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}
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return ret;
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}
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#ifdef CONFIG_SPI_FLASH_SST
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static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
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{
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int ret;
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u8 cmd[4] = {
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CMD_SST_BP,
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offset >> 16,
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offset >> 8,
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offset,
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};
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debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
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spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
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ret = spi_flash_cmd_write_enable(flash);
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if (ret)
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return ret;
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ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
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if (ret)
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return ret;
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return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
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}
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int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
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const void *buf)
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{
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size_t actual, cmd_len;
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int ret;
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u8 cmd[4];
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: Unable to claim SPI bus\n");
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return ret;
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}
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/* If the data is not word aligned, write out leading single byte */
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actual = offset % 2;
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if (actual) {
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ret = sst_byte_write(flash, offset, buf);
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if (ret)
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goto done;
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}
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offset += actual;
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ret = spi_flash_cmd_write_enable(flash);
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if (ret)
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goto done;
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cmd_len = 4;
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cmd[0] = CMD_SST_AAI_WP;
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cmd[1] = offset >> 16;
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cmd[2] = offset >> 8;
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cmd[3] = offset;
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for (; actual < len - 1; actual += 2) {
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debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
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spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
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cmd[0], offset);
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ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
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buf + actual, 2);
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if (ret) {
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debug("SF: sst word program failed\n");
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break;
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}
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ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
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if (ret)
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break;
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cmd_len = 1;
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offset += 2;
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}
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if (!ret)
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ret = spi_flash_cmd_write_disable(flash);
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/* If there is a single trailing byte, write it out */
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if (!ret && actual != len)
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ret = sst_byte_write(flash, offset, buf + actual);
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done:
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debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
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ret ? "failure" : "success", len, offset - actual);
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spi_release_bus(flash->spi);
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return ret;
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}
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#endif
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