upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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106 lines
2.0 KiB
106 lines
2.0 KiB
/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Cache support: switch on or off, get status
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*/
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#include <common.h>
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#include <command.h>
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#include <linux/compiler.h>
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static int parse_argv(const char *);
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void __weak invalidate_icache_all(void)
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{
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/* please define arch specific invalidate_icache_all */
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puts("No arch specific invalidate_icache_all available!\n");
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}
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static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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switch (argc) {
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case 2: /* on / off */
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switch (parse_argv(argv[1])) {
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case 0:
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icache_disable();
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break;
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case 1:
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icache_enable();
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break;
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case 2:
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invalidate_icache_all();
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break;
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}
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break;
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case 1: /* get status */
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printf("Instruction Cache is %s\n",
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icache_status() ? "ON" : "OFF");
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return 0;
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default:
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return CMD_RET_USAGE;
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}
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return 0;
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}
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void __weak flush_dcache_all(void)
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{
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puts("No arch specific flush_dcache_all available!\n");
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/* please define arch specific flush_dcache_all */
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}
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static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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switch (argc) {
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case 2: /* on / off */
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switch (parse_argv(argv[1])) {
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case 0:
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dcache_disable();
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break;
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case 1:
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dcache_enable();
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break;
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case 2:
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flush_dcache_all();
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break;
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}
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break;
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case 1: /* get status */
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printf("Data (writethrough) Cache is %s\n",
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dcache_status() ? "ON" : "OFF");
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return 0;
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default:
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return CMD_RET_USAGE;
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}
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return 0;
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}
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static int parse_argv(const char *s)
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{
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if (strcmp(s, "flush") == 0)
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return 2;
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else if (strcmp(s, "on") == 0)
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return 1;
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else if (strcmp(s, "off") == 0)
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return 0;
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return -1;
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}
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U_BOOT_CMD(
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icache, 2, 1, do_icache,
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"enable or disable instruction cache",
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"[on, off, flush]\n"
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" - enable, disable, or flush instruction cache"
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);
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U_BOOT_CMD(
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dcache, 2, 1, do_dcache,
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"enable or disable data cache",
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"[on, off, flush]\n"
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" - enable, disable, or flush data (writethrough) cache"
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);
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