upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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54 lines
1.7 KiB
54 lines
1.7 KiB
Texas Instruments TI SCI Reset Controller
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=========================================
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Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
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responsible for controlling the state of the IPs that are present.
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Communication between the host processor running an OS and the system
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controller happens through a protocol known as TI SCI [1].
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[1] http://processors.wiki.ti.com/index.php/TISCI
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Reset Controller Node
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=====================
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The reset controller node represents the resets of various hardware modules
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present on the SoC managed by the SYSFW. Because this relies on the TI SCI
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protocol to communicate with the SYSFW it must be a child of the sysfw node.
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Required Properties:
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--------------------
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- compatible: Must be "ti,sci-reset"
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- #reset-cells: Must be 2. Please see the reset consumer node below for
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usage details.
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Example (AM65x):
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----------------
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sysfw: sysfw {
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compatible = "ti,am654-system-controller";
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...
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k3_reset: reset-controller {
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compatible = "ti,sci-reset";
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#reset-cells = <2>;
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};
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};
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Reset Consumers
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===============
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Each of the reset consumer nodes should have the following properties,
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in addition to their own properties.
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Required Properties:
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--------------------
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- resets: A phandle and reset specifier pair, one pair for each reset signal
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that affects the device, or that the device manages. The phandle
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should point to the TI SCI reset controller node, and the reset
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specifier should have 2 cell-values. The first cell should contain
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the device ID. The second cell should contain the reset mask value
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used by system controller.
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Example (AM65x):
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----------------
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uart2: serial@02800000 {
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compatible = "ti,omap4-uart";
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...
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resets = <&k3_reset 5 1>;
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};
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