upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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105 lines
2.7 KiB
105 lines
2.7 KiB
/*
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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* Dave Liu <daveliu@freescale.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* MAXFRM - maximum frame length */
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#define MAXFRM_MASK 0x0000ffff
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#include <common.h>
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#include <phy.h>
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#include <asm/types.h>
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#include <asm/io.h>
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#include <fsl_tgec.h>
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#include "fm.h"
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#define TGEC_CMD_CFG_INIT (TGEC_CMD_CFG_NO_LEN_CHK | \
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TGEC_CMD_CFG_RX_ER_DISC | \
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TGEC_CMD_CFG_STAT_CLR | \
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TGEC_CMD_CFG_PAUSE_IGNORE | \
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TGEC_CMD_CFG_CRC_FWD)
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#define TGEC_CMD_CFG_FINAL (TGEC_CMD_CFG_NO_LEN_CHK | \
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TGEC_CMD_CFG_RX_ER_DISC | \
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TGEC_CMD_CFG_PAUSE_IGNORE | \
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TGEC_CMD_CFG_CRC_FWD)
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static void tgec_init_mac(struct fsl_enet_mac *mac)
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{
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struct tgec *regs = mac->base;
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/* mask all interrupt */
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out_be32(®s->imask, IMASK_MASK_ALL);
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/* clear all events */
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out_be32(®s->ievent, IEVENT_CLEAR_ALL);
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/* set the max receive length */
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out_be32(®s->maxfrm, mac->max_rx_len & MAXFRM_MASK);
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/*
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* 1588 disable, insert second mac disable payload length check
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* disable, normal operation, any rx error frame is discarded, clear
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* counters, pause frame ignore, no promiscuous, LAN mode Rx CRC no
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* strip, Tx CRC append, Rx disable and Tx disable
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*/
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out_be32(®s->command_config, TGEC_CMD_CFG_INIT);
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udelay(1000);
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out_be32(®s->command_config, TGEC_CMD_CFG_FINAL);
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/* multicast frame reception for the hash entry disable */
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out_be32(®s->hashtable_ctrl, 0);
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}
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static void tgec_enable_mac(struct fsl_enet_mac *mac)
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{
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struct tgec *regs = mac->base;
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setbits_be32(®s->command_config, TGEC_CMD_CFG_RXTX_EN);
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}
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static void tgec_disable_mac(struct fsl_enet_mac *mac)
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{
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struct tgec *regs = mac->base;
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clrbits_be32(®s->command_config, TGEC_CMD_CFG_RXTX_EN);
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}
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static void tgec_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
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{
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struct tgec *regs = mac->base;
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u32 mac_addr0, mac_addr1;
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/*
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* if a station address of 0x12345678ABCD, perform a write to
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* MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
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*/
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mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
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(mac_addr[1] << 8) | (mac_addr[0]);
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out_be32(®s->mac_addr_0, mac_addr0);
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mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
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out_be32(®s->mac_addr_1, mac_addr1);
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}
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static void tgec_set_interface_mode(struct fsl_enet_mac *mac,
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phy_interface_t type, int speed)
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{
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/* nothing right now */
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return;
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}
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void init_tgec(struct fsl_enet_mac *mac, void *base,
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void *phyregs, int max_rx_len)
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{
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mac->base = base;
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mac->phyregs = phyregs;
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mac->max_rx_len = max_rx_len;
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mac->init_mac = tgec_init_mac;
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mac->enable_mac = tgec_enable_mac;
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mac->disable_mac = tgec_disable_mac;
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mac->set_mac_addr = tgec_set_mac_addr;
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mac->set_if_mode = tgec_set_interface_mode;
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}
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