upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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50 lines
1.3 KiB
50 lines
1.3 KiB
/*
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* [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h]
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*
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* Copyright (C) 2007 Andrew Victor
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* Copyright (C) 2007 Atmel Corporation.
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*
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* Reset Controller (RSTC) - System peripherals regsters.
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* Based on AT91SAM9261 datasheet revision D.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef AT91_RSTC_H
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#define AT91_RSTC_H
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/* Reset Controller Status Register */
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#define AT91_ASM_RSTC_SR (ATMEL_BASE_RSTC + 0x04)
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#define AT91_ASM_RSTC_MR (ATMEL_BASE_RSTC + 0x08)
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#ifndef __ASSEMBLY__
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typedef struct at91_rstc {
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u32 cr; /* Reset Controller Control Register */
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u32 sr; /* Reset Controller Status Register */
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u32 mr; /* Reset Controller Mode Register */
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} at91_rstc_t;
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#endif /* __ASSEMBLY__ */
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#define AT91_RSTC_KEY 0xA5000000
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#define AT91_RSTC_CR_PROCRST 0x00000001
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#define AT91_RSTC_CR_PERRST 0x00000004
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#define AT91_RSTC_CR_EXTRST 0x00000008
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#define AT91_RSTC_MR_URSTEN 0x00000001
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#define AT91_RSTC_MR_URSTIEN 0x00000010
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#define AT91_RSTC_MR_ERSTL(x) ((x & 0xf) << 8)
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#define AT91_RSTC_MR_ERSTL_MASK 0x0000FF00
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#define AT91_RSTC_SR_NRSTL 0x00010000
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#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
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#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
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#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
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#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
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#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
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#define AT91_RSTC_RSTTYP_USER (4 << 8)
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#endif
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