upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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222 lines
8.5 KiB
222 lines
8.5 KiB
/* LEON2 header file. LEON2 is a SOC processor.
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*
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* (C) Copyright 2008
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __LEON2_H__
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#define __LEON2_H__
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#ifdef CONFIG_LEON2
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/* LEON 2 I/O register definitions */
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#define LEON2_PREGS 0x80000000
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#define LEON2_MCFG1 0x00
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#define LEON2_MCFG2 0x04
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#define LEON2_ECTRL 0x08
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#define LEON2_FADDR 0x0C
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#define LEON2_MSTAT 0x10
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#define LEON2_CCTRL 0x14
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#define LEON2_PWDOWN 0x18
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#define LEON2_WPROT1 0x1C
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#define LEON2_WPROT2 0x20
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#define LEON2_LCONF 0x24
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#define LEON2_TCNT0 0x40
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#define LEON2_TRLD0 0x44
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#define LEON2_TCTRL0 0x48
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#define LEON2_TCNT1 0x50
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#define LEON2_TRLD1 0x54
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#define LEON2_TCTRL1 0x58
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#define LEON2_SCNT 0x60
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#define LEON2_SRLD 0x64
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#define LEON2_UART0 0x70
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#define LEON2_UDATA0 0x70
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#define LEON2_USTAT0 0x74
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#define LEON2_UCTRL0 0x78
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#define LEON2_USCAL0 0x7C
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#define LEON2_UART1 0x80
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#define LEON2_UDATA1 0x80
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#define LEON2_USTAT1 0x84
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#define LEON2_UCTRL1 0x88
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#define LEON2_USCAL1 0x8C
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#define LEON2_IMASK 0x90
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#define LEON2_IPEND 0x94
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#define LEON2_IFORCE 0x98
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#define LEON2_ICLEAR 0x9C
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#define LEON2_IOREG 0xA0
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#define LEON2_IODIR 0xA4
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#define LEON2_IOICONF 0xA8
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#define LEON2_IPEND2 0xB0
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#define LEON2_IMASK2 0xB4
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#define LEON2_ISTAT2 0xB8
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#define LEON2_ICLEAR2 0xBC
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#ifndef __ASSEMBLER__
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/*
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* Structure for LEON memory mapped registers.
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*
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* Source: Section 6.1 - On-chip registers
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*
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* NOTE: There is only one of these structures per CPU, its base address
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* is 0x80000000, and the variable LEON_REG is placed there by the
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* linkcmds file.
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*/
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typedef struct {
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volatile unsigned int Memory_Config_1;
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volatile unsigned int Memory_Config_2;
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volatile unsigned int Edac_Control;
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volatile unsigned int Failed_Address;
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volatile unsigned int Memory_Status;
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volatile unsigned int Cache_Control;
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volatile unsigned int Power_Down;
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volatile unsigned int Write_Protection_1;
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volatile unsigned int Write_Protection_2;
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volatile unsigned int Leon_Configuration;
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volatile unsigned int dummy2;
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volatile unsigned int dummy3;
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volatile unsigned int dummy4;
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volatile unsigned int dummy5;
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volatile unsigned int dummy6;
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volatile unsigned int dummy7;
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volatile unsigned int Timer_Counter_1;
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volatile unsigned int Timer_Reload_1;
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volatile unsigned int Timer_Control_1;
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volatile unsigned int Watchdog;
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volatile unsigned int Timer_Counter_2;
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volatile unsigned int Timer_Reload_2;
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volatile unsigned int Timer_Control_2;
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volatile unsigned int dummy8;
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volatile unsigned int Scaler_Counter;
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volatile unsigned int Scaler_Reload;
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volatile unsigned int dummy9;
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volatile unsigned int dummy10;
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volatile unsigned int UART_Channel_1;
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volatile unsigned int UART_Status_1;
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volatile unsigned int UART_Control_1;
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volatile unsigned int UART_Scaler_1;
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volatile unsigned int UART_Channel_2;
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volatile unsigned int UART_Status_2;
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volatile unsigned int UART_Control_2;
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volatile unsigned int UART_Scaler_2;
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volatile unsigned int Interrupt_Mask;
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volatile unsigned int Interrupt_Pending;
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volatile unsigned int Interrupt_Force;
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volatile unsigned int Interrupt_Clear;
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volatile unsigned int PIO_Data;
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volatile unsigned int PIO_Direction;
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volatile unsigned int PIO_Interrupt;
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} LEON2_regs;
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typedef struct {
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volatile unsigned int UART_Channel;
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volatile unsigned int UART_Status;
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volatile unsigned int UART_Control;
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volatile unsigned int UART_Scaler;
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} LEON2_Uart_regs;
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#endif
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/*
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* The following constants are intended to be used ONLY in assembly
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* language files.
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*
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* NOTE: The intended style of usage is to load the address of LEON REGS
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* into a register and then use these as displacements from
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* that register.
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*/
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#define LEON_REG_MEMCFG1_OFFSET 0x00
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#define LEON_REG_MEMCFG2_OFFSET 0x04
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#define LEON_REG_EDACCTRL_OFFSET 0x08
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#define LEON_REG_FAILADDR_OFFSET 0x0C
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#define LEON_REG_MEMSTATUS_OFFSET 0x10
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#define LEON_REG_CACHECTRL_OFFSET 0x14
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#define LEON_REG_POWERDOWN_OFFSET 0x18
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#define LEON_REG_WRITEPROT1_OFFSET 0x1C
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#define LEON_REG_WRITEPROT2_OFFSET 0x20
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#define LEON_REG_LEONCONF_OFFSET 0x24
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#define LEON_REG_UNIMPLEMENTED_2_OFFSET 0x28
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#define LEON_REG_UNIMPLEMENTED_3_OFFSET 0x2C
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#define LEON_REG_UNIMPLEMENTED_4_OFFSET 0x30
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#define LEON_REG_UNIMPLEMENTED_5_OFFSET 0x34
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#define LEON_REG_UNIMPLEMENTED_6_OFFSET 0x38
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#define LEON_REG_UNIMPLEMENTED_7_OFFSET 0x3C
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#define LEON_REG_TIMERCNT1_OFFSET 0x40
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#define LEON_REG_TIMERLOAD1_OFFSET 0x44
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#define LEON_REG_TIMERCTRL1_OFFSET 0x48
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#define LEON_REG_WDOG_OFFSET 0x4C
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#define LEON_REG_TIMERCNT2_OFFSET 0x50
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#define LEON_REG_TIMERLOAD2_OFFSET 0x54
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#define LEON_REG_TIMERCTRL2_OFFSET 0x58
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#define LEON_REG_UNIMPLEMENTED_8_OFFSET 0x5C
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#define LEON_REG_SCALERCNT_OFFSET 0x60
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#define LEON_REG_SCALER_LOAD_OFFSET 0x64
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#define LEON_REG_UNIMPLEMENTED_9_OFFSET 0x68
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#define LEON_REG_UNIMPLEMENTED_10_OFFSET 0x6C
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#define LEON_REG_UARTDATA1_OFFSET 0x70
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#define LEON_REG_UARTSTATUS1_OFFSET 0x74
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#define LEON_REG_UARTCTRL1_OFFSET 0x78
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#define LEON_REG_UARTSCALER1_OFFSET 0x7C
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#define LEON_REG_UARTDATA2_OFFSET 0x80
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#define LEON_REG_UARTSTATUS2_OFFSET 0x84
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#define LEON_REG_UARTCTRL2_OFFSET 0x88
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#define LEON_REG_UARTSCALER2_OFFSET 0x8C
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#define LEON_REG_IRQMASK_OFFSET 0x90
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#define LEON_REG_IRQPEND_OFFSET 0x94
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#define LEON_REG_IRQFORCE_OFFSET 0x98
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#define LEON_REG_IRQCLEAR_OFFSET 0x9C
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#define LEON_REG_PIODATA_OFFSET 0xA0
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#define LEON_REG_PIODIR_OFFSET 0xA4
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#define LEON_REG_PIOIRQ_OFFSET 0xA8
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#define LEON_REG_SIM_RAM_SIZE_OFFSET 0xF4
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#define LEON_REG_SIM_ROM_SIZE_OFFSET 0xF8
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/*
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* Interrupt Sources
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*
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* The interrupt source numbers directly map to the trap type and to
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* the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
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* and the Interrupt Pending Registers.
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*/
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#define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR 1
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#define LEON_INTERRUPT_UART_1_RX_TX 2
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#define LEON_INTERRUPT_UART_0_RX_TX 3
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#define LEON_INTERRUPT_EXTERNAL_0 4
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#define LEON_INTERRUPT_EXTERNAL_1 5
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#define LEON_INTERRUPT_EXTERNAL_2 6
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#define LEON_INTERRUPT_EXTERNAL_3 7
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#define LEON_INTERRUPT_TIMER1 8
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#define LEON_INTERRUPT_TIMER2 9
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#define LEON_INTERRUPT_EMPTY1 10
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#define LEON_INTERRUPT_EMPTY2 11
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#define LEON_INTERRUPT_OPEN_ETH 12
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#define LEON_INTERRUPT_EMPTY4 13
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#define LEON_INTERRUPT_EMPTY5 14
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#define LEON_INTERRUPT_EMPTY6 15
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/* Timer Bits */
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#define LEON2_TIMER_CTRL_EN 0x1 /* Timer enable */
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#define LEON2_TIMER_CTRL_RS 0x2 /* Timer reStart */
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#define LEON2_TIMER_CTRL_LD 0x4 /* Timer reLoad */
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#define LEON2_TIMER1_IRQNO 8 /* Timer 1 IRQ number */
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#define LEON2_TIMER2_IRQNO 9 /* Timer 2 IRQ number */
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#define LEON2_TIMER1_IE (1<<LEON2_TIMER1_IRQNO) /* Timer 1 interrupt enable */
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#define LEON2_TIMER2_IE (1<<LEON2_TIMER2_IRQNO) /* Timer 2 interrupt enable */
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/* UART bits */
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#define LEON2_UART_CTRL_RE 1 /* UART Receiver enable */
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#define LEON2_UART_CTRL_TE 2 /* UART Transmitter enable */
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#define LEON2_UART_CTRL_RI 4 /* UART Receiver Interrupt enable */
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#define LEON2_UART_CTRL_TI 8 /* UART Transmitter Interrupt enable */
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#define LEON2_UART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
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#define LEON2_UART_STAT_DR 1 /* UART Data Ready */
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#define LEON2_UART_STAT_TSE 2 /* UART Transmit Shift Reg empty */
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#define LEON2_UART_STAT_THE 4 /* UART Transmit Hold Reg empty */
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#else
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#error Include LEON2 header file only if LEON2 processor
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#endif
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#endif
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