upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Siarhei Siamashka bf4ca384ad sunxi: dram: Autodetect DDR3 bus width and density ... In the case if the 'dram_para' struct does not specify the exact bus width or chip density, just use a trial and error method to find a usable configuration. Because all the major bugs in the DRAM initialization sequence are now hopefully fixed, it should be safe to re-initialize the DRAM controller multiple times until we get it configured right. The original Allwinner's boot0 bootloader also used a similar autodetection trick. The DDR3 spec contains the package pinout and addressing table for different possible chip densities. It appears to be impossible to distinguish between a single chip with 16 I/O data lines and a pair of chips with 8 I/O data lines in the case if they provide the same storage capacity. Because a single 16-bit chip has a higher density than a pair of equivalent 8-bit chips, it has stricter refresh timings. So in the case of doubt, we assume that 16-bit chips are used. Additionally, only Allwinner A20 has all A0-A15 address lines and can support densities up to 8192. The older Allwinner A10 and Allwinner A13 can only support densities up to 4096. We deliberately leave out DDR2, dual-rank configurations and the special case of a 8-bit chip with density 8192. None of these configurations seem to have been ever used in real devices. And no new devices are likely to use these exotic configurations (because only up to 2GB of RAM can be populated in any case). This DRAM autodetection feature potentially allows to have a single low performance fail-safe DDR3 initialiazation for a universal single bootloader binary, which can be compatible with all Allwinner A10/A13/A20 based devices (if the ifdefs are replaced with a runtime SoC type detection). Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>		11 years ago
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Makefile	sunxi: HYP/non-sec: add sun7i PSCI backend	11 years ago
board.c	sunxi: Add CONFIG_MACPWR option	11 years ago
clock.c	…
clock_sun4i.c	ahci: provide sunxi SATA driver using AHCI platform framework	11 years ago
config.mk	sunxi: non-FEL SPL boot support for sun7i	11 years ago
cpu_info.c	sunxi: Add sun5i support	11 years ago
dram.c	sunxi: dram: Autodetect DDR3 bus width and density	11 years ago
pinmux.c	…
psci.S	sunxi: HYP/non-sec: add sun7i PSCI backend	11 years ago
start.c	sunxi: add sun7i cpu, board and start of day support	11 years ago
timer.c	…
u-boot-spl-fel.lds	sunxi: Add i2c support	11 years ago
u-boot-spl.lds	sunxi: Add i2c support	11 years ago