upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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York Sun 2becdc6f9d powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ram ... MPC85xx has been using locked L1 cache as init_ram. L1 cache is a write through cache on E6500. L2 cache is enabled to to hold the data. This patch locks/unlocks L2 cache to ensure no data cast out from L2 cache. Signed-off-by: York Sun <yorksun@freescale.com> Reported-by: Jeffery Zhu <Jefferry.Zhu@freescale.com>		9 years ago
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cpu	powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ram	9 years ago
dts	powerpc: gitignore: ignore PowerPC DTBs	10 years ago
include/asm	Correct License and Copyright information on few files	9 years ago
lib	ppc4xx: Remove sc3 board	10 years ago
Kconfig	kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86	9 years ago
Makefile	Kbuild: introduce Makefile in arch/$ARCH/	10 years ago
config.mk	generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig	10 years ago