upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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59 lines
1.5 KiB
59 lines
1.5 KiB
CONFIG_ARM=y
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# CONFIG_SPL_USE_ARCH_MEMCPY is not set
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# CONFIG_SPL_USE_ARCH_MEMSET is not set
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x60000000
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ROCKCHIP_RK3188=y
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CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
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CONFIG_TARGET_ROCK=y
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CONFIG_DEBUG_UART_BASE=0x20064000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_STACK_R_ADDR=0x60080000
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CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
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CONFIG_DEBUG_UART=y
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
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CONFIG_RANDOM_UUID=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_SPL_OF_PLATDATA=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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# CONFIG_SPL_SIMPLE_BUS is not set
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CONFIG_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_LED=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_ROCKCHIP_RK3188=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_PMIC_ACT8846=y
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CONFIG_REGULATOR_ACT8846=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_RAM=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYSRESET=y
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CONFIG_TIMER=y
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CONFIG_SPL_TIMER=y
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CONFIG_ROCKCHIP_TIMER=y
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CONFIG_USB=y
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CONFIG_ROCKCHIP_USB2_PHY=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_TPL_TINY_MEMSET=y
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_ERRNO_STR=y
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