upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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325 lines
9.3 KiB
325 lines
9.3 KiB
/*
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* Ulf Samuelsson <ulf@atmel.com>
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* Rick Bronson <rick@efn.org>
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*
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* Configuration settings for the AT91RM9200EK board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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/*
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* from 18.432 MHz crystal
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* (18432000 / 4 * 39)
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*/
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#define AT91C_MAIN_CLOCK 179712000
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/*
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* peripheral clock
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* (AT91C_MASTER_CLOCK / 3)
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*/
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#define AT91C_MASTER_CLOCK 59904000
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
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#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
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#define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define USE_920T_MMU 1
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* LowLevel Init
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*/
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
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/* flash */
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#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
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#define CONFIG_SYS_MC_PUP_VAL 0x00000000
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#define CONFIG_SYS_MC_PUER_VAL 0x00000000
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#define CONFIG_SYS_MC_ASR_VAL 0x00000000
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#define CONFIG_SYS_MC_AASR_VAL 0x00000000
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#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
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#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
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/* clocks */
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#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
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#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
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/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
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#define CONFIG_SYS_MCKR_VAL 0x00000202
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/* sdram */
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#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
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#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
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#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
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#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
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#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
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#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
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#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */
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#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
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#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
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#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
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#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
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#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
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#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
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#else
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
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#define CONFIG_SYS_AT91C_BRGR_DIVISOR 33
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/*
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* Memory Configuration
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x20000000
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#define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END \
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(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144)
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/*
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* Hardware drivers
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*/
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/*
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* UART Configuration
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*
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* define one of these to choose the DBGU,
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* USART0 or USART1 as console
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*/
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#define CONFIG_AT91RM9200_USART
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#define CONFIG_DBGU
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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/* don't include RTS/CTS flow control support */
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#undef CONFIG_HWFLOW
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/* disable modem initialization stuff */
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#undef CONFIG_MODEM_SUPPORT
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#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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#define CONFIG_BAUDRATE 115200
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_PING
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_MISC
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#undef CONFIG_CMD_LOADS
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#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
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/* Options for MMC/SD Card */
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#define CONFIG_DOS_PARTITION 1
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#undef CONFIG_MMC
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#define CONFIG_SYS_MMC_BASE 0xFFFB4000
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#define CONFIG_SYS_MMC_BLOCKSIZE 512
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/*
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* Network Driver Setting
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*/
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#define CONFIG_DRIVER_ETHER
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_AT91C_USE_RMII
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/*
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* AC Characteristics
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* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns
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*/
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#define DATAFLASH_TCSS (0xC << 16)
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#define DATAFLASH_TCHS (0x1 << 24)
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#if defined(CONFIG_HAS_DATAFLASH)
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#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
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#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
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/* Logical adress for CS0 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
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/* Logical adress for CS3 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000
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#define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1
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#define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22
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#endif
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/*
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* NOR Flash
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*/
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#define CONFIG_SYS_FLASH_BASE 0x10000000
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#define PHYS_FLASH_SIZE 0x800000 /* 8MB */
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#define CONFIG_SYS_FLASH_CFI 1
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_FLASH_PROTECTION
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/*
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* Environment Settings
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*/
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#ifdef CONFIG_ENV_IS_IN_DATAFLASH
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/*
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* Datasflash Environment Settings
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*/
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#define CONFIG_ENV_OFFSET 0x4200
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#define CONFIG_ENV_ADDR \
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(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
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/* 8 * 1056 really , but start.s is not OK with this*/
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#define CONFIG_ENV_SIZE 0x2000
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#else
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/*
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* NOR Flash Environment Settings
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*/
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#define CONFIG_ENV_IS_IN_FLASH 1
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#ifdef CONFIG_SKIP_LOWLEVEL_INIT
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/*
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* between boot.bin and u-boot.bin.gz
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*/
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000)
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#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
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#else
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/*
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* after u-boot.bin
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*/
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#define CONFIG_ENV_ADDR \
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(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
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/* The following #defines are needed to get flash environment right */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN \
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(CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE)
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
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/*
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* Boot option
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*/
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#define CONFIG_BOOTDELAY 3
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#ifdef CONFIG_SKIP_LOWLEVEL_INIT
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/* boot.bin, env, u-boot.bin.gz */
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#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
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#define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000)
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#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
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#else
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/* u-boot.bin */
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#define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */
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#define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 128 KBytes */
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
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#define CONFIG_ENV_OVERWRITE 1
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/*
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* USB Config
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*/
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#define CONFIG_CMD_USB
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#define CONFIG_USB_OHCI_NEW 1
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#define CONFIG_USB_KEYBOARD 1
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#define CONFIG_USB_STORAGE 1
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#define CONFIG_DOS_PARTITION 1
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#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
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#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
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#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
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/*
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* I2C
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*/
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#define CONFIG_HARD_I2C
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#ifdef CONFIG_HARD_I2C
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C_SPEED 0 /* not used */
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#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
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#endif
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/*
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* Shell Settings
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*/
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_SYS_LONGHELP 1
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#define CONFIG_AUTO_COMPLETE 1
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#define CONFIG_SYS_HUSH_PARSER 1
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#ifndef __ASSEMBLY__
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/*-----------------------------------------------------------------------
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* Board specific extension for bd_info
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*
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* This structure is embedded in the global bd_info (bd_t) structure
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* and can be used by the board specific code (eg board/...)
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*/
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struct bd_info_ext {
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/* helper variable for board environment handling
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*
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* env_crc_valid == 0 => uninitialised
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* env_crc_valid > 0 => environment crc in flash is valid
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* env_crc_valid < 0 => environment crc in flash is invalid
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*/
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int env_crc_valid;
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};
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#endif
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#define CONFIG_SYS_HZ 1000
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/*
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* AT91C_TC0_CMR is implicitly set to
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* AT91C_TC_TIMER_DIV1_CLOCK
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*/
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#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \
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, 0x1000)
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/* size in bytes reserved for initial data */
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#define CONFIG_SYS_GBL_DATA_SIZE 128
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#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
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#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/
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#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/
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#endif
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