upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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262 lines
6.6 KiB
262 lines
6.6 KiB
/*
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* NVIDIA Tegra20 GPIO handling.
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* (C) Copyright 2010-2012
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Based on (mostly copied from) kw_gpio.c based Linux 2.6 kernel driver.
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* Tom Warren (twarren@nvidia.com)
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/bitops.h>
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#include <asm/arch/tegra20.h>
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#include <asm/gpio.h>
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enum {
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TEGRA20_CMD_INFO,
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TEGRA20_CMD_PORT,
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TEGRA20_CMD_OUTPUT,
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TEGRA20_CMD_INPUT,
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};
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static struct gpio_names {
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char name[GPIO_NAME_SIZE];
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} gpio_names[MAX_NUM_GPIOS];
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static char *get_name(int i)
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{
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return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
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}
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/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */
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static int get_config(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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int type;
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u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
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type = (u >> GPIO_BIT(gpio)) & 1;
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debug("get_config: port = %d, bit = %d is %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
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return type;
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}
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/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */
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static void set_config(unsigned gpio, int type)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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debug("set_config: port = %d, bit = %d, %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
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u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
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if (type) /* GPIO */
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u |= 1 << GPIO_BIT(gpio);
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else
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u &= ~(1 << GPIO_BIT(gpio));
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writel(u, &bank->gpio_config[GPIO_PORT(gpio)]);
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}
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/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */
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static int get_direction(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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int dir;
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u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
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dir = (u >> GPIO_BIT(gpio)) & 1;
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debug("get_direction: port = %d, bit = %d, %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
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return dir;
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}
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/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */
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static void set_direction(unsigned gpio, int output)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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debug("set_direction: port = %d, bit = %d, %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
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u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
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if (output)
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u |= 1 << GPIO_BIT(gpio);
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else
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u &= ~(1 << GPIO_BIT(gpio));
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writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]);
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}
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/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */
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static void set_level(unsigned gpio, int high)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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debug("set_level: port = %d, bit %d == %d\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
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u = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
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if (high)
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u |= 1 << GPIO_BIT(gpio);
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else
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u &= ~(1 << GPIO_BIT(gpio));
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writel(u, &bank->gpio_out[GPIO_PORT(gpio)]);
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}
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/*
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* Generic_GPIO primitives.
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*/
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int gpio_request(unsigned gpio, const char *label)
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{
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if (gpio >= MAX_NUM_GPIOS)
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return -1;
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if (label != NULL) {
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strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE);
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gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
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}
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/* Configure as a GPIO */
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set_config(gpio, 1);
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return 0;
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}
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int gpio_free(unsigned gpio)
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{
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if (gpio >= MAX_NUM_GPIOS)
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return -1;
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gpio_names[gpio].name[0] = '\0';
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/* Do not configure as input or change pin mux here */
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return 0;
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}
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/* read GPIO OUT value of pin 'gpio' */
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static int gpio_get_output_value(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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int val;
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debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
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val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
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return (val >> GPIO_BIT(gpio)) & 1;
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}
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/* set GPIO pin 'gpio' as an input */
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int gpio_direction_input(unsigned gpio)
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{
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debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
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/* Configure GPIO direction as input. */
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set_direction(gpio, 0);
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return 0;
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}
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/* set GPIO pin 'gpio' as an output, with polarity 'value' */
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int gpio_direction_output(unsigned gpio, int value)
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{
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debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio),
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value ? "HIGH" : "LOW");
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/* Configure GPIO output value. */
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set_level(gpio, value);
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/* Configure GPIO direction as output. */
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set_direction(gpio, 1);
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return 0;
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}
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/* read GPIO IN value of pin 'gpio' */
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int gpio_get_value(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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int val;
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debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
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val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
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return (val >> GPIO_BIT(gpio)) & 1;
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}
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/* write GPIO OUT value to pin 'gpio' */
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int gpio_set_value(unsigned gpio, int value)
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{
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debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
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/* Configure GPIO output value. */
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set_level(gpio, value);
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return 0;
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}
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/*
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* Display Tegra GPIO information
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*/
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void gpio_info(void)
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{
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unsigned c;
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int type;
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for (c = 0; c < MAX_NUM_GPIOS; c++) {
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type = get_config(c); /* GPIO, not SFPIO */
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if (type) {
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printf("GPIO_%d:\t%s is an %s, ", c,
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get_name(c),
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get_direction(c) ? "OUTPUT" : "INPUT");
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if (get_direction(c))
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printf("value = %d", gpio_get_output_value(c));
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else
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printf("value = %d", gpio_get_value(c));
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printf("\n");
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} else
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continue;
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}
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}
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