upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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188 lines
5.0 KiB
188 lines
5.0 KiB
/*
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* Copyright (C) 2014 Freescale Semiconductor
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* Perform extra checking */
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#include <common.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <linux/types.h>
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#include <asm/atomic.h>
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#include <malloc.h>
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#include <asm/arch/soc.h>
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#include <fsl-mc/fsl_qbman_base.h>
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#define QBMAN_CHECKING
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/* Any time there is a register interface which we poll on, this provides a
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* "break after x iterations" scheme for it. It's handy for debugging, eg.
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* where you don't want millions of lines of log output from a polling loop
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* that won't, because such things tend to drown out the earlier log output
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* that might explain what caused the problem. (NB: put ";" after each macro!)
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* TODO: we should probably remove this once we're done sanitising the
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* simulator...
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*/
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#define DBG_POLL_START(loopvar) (loopvar = 10)
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#define DBG_POLL_CHECK(loopvar) \
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do {if (!(loopvar--)) BUG_ON(NULL == "DBG_POLL_CHECK"); } while (0)
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/* For CCSR or portal-CINH registers that contain fields at arbitrary offsets
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* and widths, these macro-generated encode/decode/isolate/remove inlines can
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* be used.
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*
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* Eg. to "d"ecode a 14-bit field out of a register (into a "uint16_t" type),
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* where the field is located 3 bits "up" from the least-significant bit of the
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* register (ie. the field location within the 32-bit register corresponds to a
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* mask of 0x0001fff8), you would do;
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* uint16_t field = d32_uint16_t(3, 14, reg_value);
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*
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* Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE,
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* non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!"
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* operator) into a register at bit location 0x00080000 (19 bits "in" from the
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* LS bit), do;
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* reg_value |= e32_int(19, 1, !!field);
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*
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* If you wish to read-modify-write a register, such that you leave the 14-bit
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* field as-is but have all other fields set to zero, then "i"solate the 14-bit
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* value using;
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* reg_value = i32_uint16_t(3, 14, reg_value);
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*
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* Alternatively, you could "r"emove the 1-bit boolean field (setting it to
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* zero) but leaving all other fields as-is;
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* reg_val = r32_int(19, 1, reg_value);
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*
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*/
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#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
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(uint32_t)((1 << width) - 1))
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#define DECLARE_CODEC32(t) \
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static inline uint32_t e32_##t(uint32_t lsoffset, uint32_t width, t val) \
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{ \
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BUG_ON(width > (sizeof(t) * 8)); \
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return ((uint32_t)val & MAKE_MASK32(width)) << lsoffset; \
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} \
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static inline t d32_##t(uint32_t lsoffset, uint32_t width, uint32_t val) \
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{ \
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BUG_ON(width > (sizeof(t) * 8)); \
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return (t)((val >> lsoffset) & MAKE_MASK32(width)); \
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} \
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static inline uint32_t i32_##t(uint32_t lsoffset, uint32_t width, \
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uint32_t val) \
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{ \
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BUG_ON(width > (sizeof(t) * 8)); \
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return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \
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} \
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static inline uint32_t r32_##t(uint32_t lsoffset, uint32_t width, \
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uint32_t val) \
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{ \
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BUG_ON(width > (sizeof(t) * 8)); \
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return ~(MAKE_MASK32(width) << lsoffset) & val; \
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}
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DECLARE_CODEC32(uint32_t)
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DECLARE_CODEC32(uint16_t)
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DECLARE_CODEC32(uint8_t)
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DECLARE_CODEC32(int)
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/*********************/
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/* Debugging assists */
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/*********************/
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static inline void __hexdump(unsigned long start, unsigned long end,
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unsigned long p, size_t sz, const unsigned char *c)
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{
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while (start < end) {
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unsigned int pos = 0;
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char buf[64];
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int nl = 0;
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pos += sprintf(buf + pos, "%08lx: ", start);
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do {
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if ((start < p) || (start >= (p + sz)))
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pos += sprintf(buf + pos, "..");
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else
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pos += sprintf(buf + pos, "%02x", *(c++));
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if (!(++start & 15)) {
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buf[pos++] = '\n';
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nl = 1;
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} else {
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nl = 0;
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if (!(start & 1))
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buf[pos++] = ' ';
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if (!(start & 3))
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buf[pos++] = ' ';
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}
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} while (start & 15);
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if (!nl)
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buf[pos++] = '\n';
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buf[pos] = '\0';
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debug("%s", buf);
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}
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}
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static inline void hexdump(const void *ptr, size_t sz)
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{
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unsigned long p = (unsigned long)ptr;
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unsigned long start = p & ~(unsigned long)15;
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unsigned long end = (p + sz + 15) & ~(unsigned long)15;
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const unsigned char *c = ptr;
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__hexdump(start, end, p, sz, c);
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}
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#if defined(__BIG_ENDIAN)
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#define DQRR_TOK_OFFSET 0
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#else
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#define DQRR_TOK_OFFSET 24
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#endif
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/* Similarly-named functions */
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#define upper32(a) upper_32_bits(a)
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#define lower32(a) lower_32_bits(a)
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/****************/
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/* arch assists */
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/****************/
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static inline void dcbz(void *ptr)
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{
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uint32_t *p = ptr;
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BUG_ON((unsigned long)ptr & 63);
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p[0] = 0;
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p[1] = 0;
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p[2] = 0;
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p[3] = 0;
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p[4] = 0;
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p[5] = 0;
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p[6] = 0;
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p[7] = 0;
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p[8] = 0;
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p[9] = 0;
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p[10] = 0;
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p[11] = 0;
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p[12] = 0;
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p[13] = 0;
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p[14] = 0;
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p[15] = 0;
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}
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#define lwsync()
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void qbman_version(u32 *major, u32 *minor)
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{
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u32 svr_dev_id;
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/*
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* LS2080A SoC and its personalities has qbman cotroller version 4.0
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* New SoCs like LS2088A, LS1088A has qbman conroller version 4.1
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*/
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svr_dev_id = get_svr() >> 16;
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if (svr_dev_id == SVR_DEV_LS2080A) {
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*major = 4;
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*minor = 0;
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} else {
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*major = 4;
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*minor = 1;
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}
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}
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#include "qbman_sys.h"
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