upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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71 lines
1.6 KiB
71 lines
1.6 KiB
/*
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* OpenRISC gpio driver
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*
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* Copyright (C) 2011 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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*
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* based on nios2 gpio driver
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* Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
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*
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* when CONFIG_SYS_GPIO_BASE is not defined, board may provide
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* its own driver.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifdef CONFIG_SYS_GPIO_BASE
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#include <asm/io.h>
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static inline int gpio_request(unsigned gpio, const char *label)
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{
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return 0;
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}
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static inline int gpio_free(unsigned gpio)
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{
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return 0;
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}
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static inline int gpio_get_value(unsigned gpio)
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{
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return (readb(CONFIG_SYS_GPIO_BASE + gpio/8) >> gpio%8) & 0x1;
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}
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static inline void gpio_set_value(unsigned gpio, int value)
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{
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u8 tmp = readb(CONFIG_SYS_GPIO_BASE + gpio/8);
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if (value)
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tmp |= (1 << gpio%8);
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else
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tmp &= ~(1 << gpio%8);
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writeb(tmp, CONFIG_SYS_GPIO_BASE + gpio/8);
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}
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static inline int gpio_direction_input(unsigned gpio)
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{
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gpio_set_value(gpio + CONFIG_SYS_GPIO_WIDTH, 0);
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return 0;
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}
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static inline int gpio_direction_output(unsigned gpio, int value)
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{
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gpio_set_value(gpio + CONFIG_SYS_GPIO_WIDTH, 1);
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gpio_set_value(gpio, value);
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return 0;
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}
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static inline int gpio_is_valid(int number)
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{
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return ((unsigned)number) < CONFIG_SYS_GPIO_WIDTH;
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}
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#else
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extern int gpio_request(unsigned gpio, const char *label);
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extern int gpio_free(unsigned gpio);
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extern int gpio_direction_input(unsigned gpio);
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extern int gpio_direction_output(unsigned gpio, int value);
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extern int gpio_get_value(unsigned gpio);
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extern void gpio_set_value(unsigned gpio, int value);
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extern int gpio_is_valid(int number);
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#endif /* CONFIG_SYS_GPIO_BASE */
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