upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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291 lines
7.4 KiB
291 lines
7.4 KiB
/*
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* (C) Copyright 2001
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* The original I2C interface was
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* (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
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* AIRVENT SAM s.p.a - RIMINI(ITALY)
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* but has been changed substantially.
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*/
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#ifndef _I2C_H_
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#define _I2C_H_
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/*
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* WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
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*
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* The implementation MUST NOT use static or global variables if the
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* I2C routines are used to read SDRAM configuration information
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* because this is done before the memories are initialized. Limited
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* use of stack-based variables are OK (the initial stack size is
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* limited).
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*
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* WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
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*/
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/*
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* Configuration items.
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*/
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#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
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#ifdef CONFIG_I2C_MULTI_BUS
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#define MAX_I2C_BUS 2
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#define I2C_MULTI_BUS 1
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#else
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#define MAX_I2C_BUS 1
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#define I2C_MULTI_BUS 0
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#endif
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#if !defined(CONFIG_SYS_MAX_I2C_BUS)
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#define CONFIG_SYS_MAX_I2C_BUS MAX_I2C_BUS
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#endif
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/* define the I2C bus number for RTC and DTT if not already done */
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#if !defined(CONFIG_SYS_RTC_BUS_NUM)
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#define CONFIG_SYS_RTC_BUS_NUM 0
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#endif
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#if !defined(CONFIG_SYS_DTT_BUS_NUM)
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#define CONFIG_SYS_DTT_BUS_NUM 0
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#endif
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#if !defined(CONFIG_SYS_SPD_BUS_NUM)
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#define CONFIG_SYS_SPD_BUS_NUM 0
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#endif
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#ifndef I2C_SOFT_DECLARATIONS
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# if defined(CONFIG_MPC8260)
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# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
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# elif defined(CONFIG_8xx)
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# define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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# elif (defined(CONFIG_AT91RM9200) || \
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defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
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defined(CONFIG_AT91SAM9263)) && !defined(CONFIG_AT91_LEGACY)
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# define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
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# else
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# define I2C_SOFT_DECLARATIONS
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# endif
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#endif
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#ifdef CONFIG_8xx
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/* Set default value for the I2C bus speed on 8xx. In the
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* future, we'll define these in all 8xx board config files.
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*/
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#ifndef CONFIG_SYS_I2C_SPEED
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#define CONFIG_SYS_I2C_SPEED 50000
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#endif
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#endif
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/*
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* Many boards/controllers/drivers don't support an I2C slave interface so
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* provide a default slave address for them for use in common code. A real
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* value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
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* support a slave interface.
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*/
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#ifndef CONFIG_SYS_I2C_SLAVE
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#define CONFIG_SYS_I2C_SLAVE 0xfe
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#endif
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/*
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* Initialization, must be called once on start up, may be called
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* repeatedly to change the speed and slave addresses.
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*/
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void i2c_init(int speed, int slaveaddr);
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void i2c_init_board(void);
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#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
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void i2c_board_late_init(void);
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#endif
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#if defined(CONFIG_I2C_MUX)
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typedef struct _mux {
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uchar chip;
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uchar channel;
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char *name;
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struct _mux *next;
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} I2C_MUX;
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typedef struct _mux_device {
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int busid;
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I2C_MUX *mux; /* List of muxes, to reach the device */
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struct _mux_device *next;
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} I2C_MUX_DEVICE;
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I2C_MUX_DEVICE *i2c_mux_search_device(int id);
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I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf);
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int i2x_mux_select_mux(int bus);
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int i2c_mux_ident_muxstring_f (uchar *buf);
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#endif
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/*
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* Probe the given I2C chip address. Returns 0 if a chip responded,
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* not 0 on failure.
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*/
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int i2c_probe(uchar chip);
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/*
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* Read/Write interface:
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* chip: I2C chip address, range 0..127
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* addr: Memory (register) address within the chip
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* alen: Number of bytes to use for addr (typically 1, 2 for larger
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* memories, 0 for register type devices with only one
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* register)
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* buffer: Where to read/write the data
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* len: How many bytes to read/write
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
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int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
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/*
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* Utility routines to read/write registers.
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*/
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static inline u8 i2c_reg_read(u8 addr, u8 reg)
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{
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u8 buf;
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#ifdef CONFIG_8xx
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/* MPC8xx needs this. Maybe one day we can get rid of it. */
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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#ifdef DEBUG
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printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
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#endif
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i2c_read(addr, reg, 1, &buf, 1);
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return buf;
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}
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static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
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{
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#ifdef CONFIG_8xx
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/* MPC8xx needs this. Maybe one day we can get rid of it. */
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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#ifdef DEBUG
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printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
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__func__, addr, reg, val);
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#endif
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i2c_write(addr, reg, 1, &val, 1);
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}
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/*
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* Functions for setting the current I2C bus and its speed
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*/
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/*
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* i2c_set_bus_num:
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*
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* Change the active I2C bus. Subsequent read/write calls will
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* go to this one.
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*
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* bus - bus index, zero based
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*
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* Returns: 0 on success, not 0 on failure
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*
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*/
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int i2c_set_bus_num(unsigned int bus);
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/*
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* i2c_get_bus_num:
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*
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* Returns index of currently active I2C bus. Zero-based.
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*/
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unsigned int i2c_get_bus_num(void);
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/*
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* i2c_set_bus_speed:
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*
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* Change the speed of the active I2C bus
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*
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* speed - bus speed in Hz
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*
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* Returns: 0 on success, not 0 on failure
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*
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*/
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int i2c_set_bus_speed(unsigned int);
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/*
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* i2c_get_bus_speed:
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*
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* Returns speed of currently active I2C bus in Hz
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*/
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unsigned int i2c_get_bus_speed(void);
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/* NOTE: These two functions MUST be always_inline to avoid code growth! */
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static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
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static inline unsigned int I2C_GET_BUS(void)
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{
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return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
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}
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static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
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static inline void I2C_SET_BUS(unsigned int bus)
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{
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if (I2C_MULTI_BUS)
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i2c_set_bus_num(bus);
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}
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/* Multi I2C definitions */
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enum {
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I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
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I2C_8, I2C_9, I2C_10,
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};
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/* Multi I2C busses handling */
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#ifdef CONFIG_SOFT_I2C_MULTI_BUS
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extern int get_multi_scl_pin(void);
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extern int get_multi_sda_pin(void);
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extern int multi_i2c_init(void);
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#endif
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/**
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* Get FDT values for i2c bus.
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*
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* @param blob Device tree blbo
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* @return the number of I2C bus
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*/
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void board_i2c_init(const void *blob);
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/**
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* Find the I2C bus number by given a FDT I2C node.
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*
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* @param blob Device tree blbo
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* @param node FDT I2C node to find
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* @return the number of I2C bus (zero based), or -1 on error
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*/
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int i2c_get_bus_num_fdt(int node);
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/**
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* Reset the I2C bus represented by the given a FDT I2C node.
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*
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* @param blob Device tree blbo
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* @param node FDT I2C node to find
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* @return 0 if port was reset, -1 if not found
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*/
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int i2c_reset_port_fdt(const void *blob, int node);
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#endif /* _I2C_H_ */
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