upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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123 lines
3.2 KiB
123 lines
3.2 KiB
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* Modified to support C structur SoC access by
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* Andreas Bießmann <biessmann@corscience.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <serial.h>
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#include <linux/compiler.h>
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#include <asm/io.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/hardware.h>
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#include "atmel_usart.h"
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DECLARE_GLOBAL_DATA_PTR;
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static void atmel_serial_setbrg(void)
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{
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atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
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unsigned long divisor;
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unsigned long usart_hz;
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/*
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* Master Clock
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* Baud Rate = --------------
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* 16 * CD
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*/
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usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
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divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
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writel(USART3_BF(CD, divisor), &usart->brgr);
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}
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static int atmel_serial_init(void)
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{
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atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
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/*
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* Just in case: drain transmitter register
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* 1000us is enough for baudrate >= 9600
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*/
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if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
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__udelay(1000);
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writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
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serial_setbrg();
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writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
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| USART3_BF(USCLKS, USART3_USCLKS_MCK)
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| USART3_BF(CHRL, USART3_CHRL_8)
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| USART3_BF(PAR, USART3_PAR_NONE)
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| USART3_BF(NBSTOP, USART3_NBSTOP_1)),
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&usart->mr);
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writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
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/* 100us is enough for the new settings to be settled */
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__udelay(100);
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return 0;
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}
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static void atmel_serial_putc(char c)
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{
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atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
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if (c == '\n')
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serial_putc('\r');
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while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
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writel(c, &usart->thr);
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}
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static int atmel_serial_getc(void)
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{
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atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
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while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
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WATCHDOG_RESET();
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return readl(&usart->rhr);
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}
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static int atmel_serial_tstc(void)
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{
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atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
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return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
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}
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static struct serial_device atmel_serial_drv = {
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.name = "atmel_serial",
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.start = atmel_serial_init,
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.stop = NULL,
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.setbrg = atmel_serial_setbrg,
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.putc = atmel_serial_putc,
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.puts = default_serial_puts,
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.getc = atmel_serial_getc,
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.tstc = atmel_serial_tstc,
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};
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void atmel_serial_initialize(void)
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{
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serial_register(&atmel_serial_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &atmel_serial_drv;
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}
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