upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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147 lines
3.6 KiB
147 lines
3.6 KiB
/*
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* (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew, Tsi-Chung.Liew@freescale.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/*
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* Minimal serial functions needed to use one of the uart ports
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* as serial console interface.
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*/
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#include <common.h>
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#include <serial.h>
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#include <linux/compiler.h>
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#include <asm/immap.h>
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#include <asm/uart.h>
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DECLARE_GLOBAL_DATA_PTR;
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extern void uart_port_conf(int port);
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static int mcf_serial_init(void)
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{
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volatile uart_t *uart;
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u32 counter;
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uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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uart_port_conf(CONFIG_SYS_UART_PORT);
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/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
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uart->ucr = UART_UCR_RESET_RX;
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uart->ucr = UART_UCR_RESET_TX;
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uart->ucr = UART_UCR_RESET_ERROR;
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uart->ucr = UART_UCR_RESET_MR;
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__asm__("nop");
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uart->uimr = 0;
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/* write to CSR: RX/TX baud rate from timers */
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uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK);
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uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE);
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uart->umr = UART_UMR_SB_STOP_BITS_1;
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/* Setting up BaudRate */
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counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2));
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counter = counter / gd->baudrate;
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/* write to CTUR: divide counter upper byte */
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uart->ubg1 = (u8) ((counter & 0xff00) >> 8);
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/* write to CTLR: divide counter lower byte */
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uart->ubg2 = (u8) (counter & 0x00ff);
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uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED);
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return (0);
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}
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static void mcf_serial_putc(const char c)
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{
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volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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if (c == '\n')
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serial_putc('\r');
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/* Wait for last character to go. */
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while (!(uart->usr & UART_USR_TXRDY)) ;
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uart->utb = c;
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}
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static int mcf_serial_getc(void)
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{
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volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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/* Wait for a character to arrive. */
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while (!(uart->usr & UART_USR_RXRDY)) ;
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return uart->urb;
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}
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static int mcf_serial_tstc(void)
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{
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volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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return (uart->usr & UART_USR_RXRDY);
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}
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static void mcf_serial_setbrg(void)
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{
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volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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u32 counter;
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/* Setting up BaudRate */
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counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2));
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counter = counter / gd->baudrate;
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/* write to CTUR: divide counter upper byte */
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uart->ubg1 = ((counter & 0xff00) >> 8);
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/* write to CTLR: divide counter lower byte */
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uart->ubg2 = (counter & 0x00ff);
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uart->ucr = UART_UCR_RESET_RX;
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uart->ucr = UART_UCR_RESET_TX;
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uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED;
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}
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static struct serial_device mcf_serial_drv = {
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.name = "mcf_serial",
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.start = mcf_serial_init,
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.stop = NULL,
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.setbrg = mcf_serial_setbrg,
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.putc = mcf_serial_putc,
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.puts = default_serial_puts,
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.getc = mcf_serial_getc,
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.tstc = mcf_serial_tstc,
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};
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void mcf_serial_initialize(void)
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{
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serial_register(&mcf_serial_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &mcf_serial_drv;
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}
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