upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/board/gen860t
Wolfgang Denk 77ddac9480 Cleanup for GCC-4.x 19 years ago
..
Makefile * Code cleanup: 22 years ago
README * Code cleanup: 22 years ago
beeper.c Initial revision 22 years ago
beeper.h
config.mk
flash.c * Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length 22 years ago
fpga.c * Some code cleanup 21 years ago
fpga.h Initial revision 23 years ago
gen860t.c Cleanup for GCC-4.x 19 years ago
ioport.c * Some code cleanup 21 years ago
ioport.h
u-boot-flashenv.lds Fix problems with ld version 2.16 (dot outside sections problem) 20 years ago
u-boot.lds Fix problems with ld version 2.16 (dot outside sections problem) 20 years ago

README

This directory contains board specific code for a generic MPC860T based
embedded computer, called 'GEN860T'. The design is generic in the sense that
common, readily available components are used and that the architecture of the
system is relatively straightforward:

One eight bit wide boot (FLASH) memory
32 bit main memory using SDRAM
DOC 2000+
Ethernet PHY
Some I2C peripheral devices: Atmel AT24C256 EEPROM, Maxim DS1337 RTC.
Some other miscellaneous peripherals

NOTE: There are references to a XIlinx FPGA and Mil-Std 1553 databus in this
port. I guess the computer is not as generic as I first said 8) However,
these extras can be safely ignored.

Given the GEN860T files, it should be pretty easy to reverse engineer the
hardware configuration, if that's useful to you. Hopefully, this code will
be useful to someone as a basis for a port to a new system or as a head start
on a custom design. If you end up using any of this, I would appreciate
hearing from you, especially if you discover bugs or find ways to improve the
quality of this U-Boot port.

Here are the salient features of the system:
Clock : 33.3 Mhz oscillator
Processor core frequency : 66.6 Mhz if in 1:2:1 mode; can also run 1:1
Bus frequency : 33.3 Mhz

Main memory:
Type : SDRAM
Width : 32 bits
Size : 64 mibibytes
Chip : Two Micron MT48LC16M16A2TG-7E
CS : MPC860T CS1*/UPMA
UPMA CONNECTIONS:
SDRAM A10 : GPLA0*
SDRAM CAS* : GPLA2*
SDRAM WE* : GPLA3*
SDRAM RAS* : GPLA4*

Boot memory:
Type : FLASH
Width : 8 bits
Size : 16 mibibytes
Chip : One Intel 28F128J3A (StrataFlash)
CS : MPC860T CS0*/GPCM (this is the "boot" chip select)

EEPROM memory:
Type : Serial I2C EEPROM
Width : 8 bits
Size : 32 kibibytes
Chip : One Atmel AT25C256
CS : 0x50 (external I2C address pins on device are tied to GND)

Filesystem memory:
Type : NAND FLASH (Toshiba)
Width : 8 bits (i.e. interface to DOC is 8 bits)
Size : 32 mibibytes
Chip : One DiskOnCHip Millenium Plus (DOC 2000+)
CS : MPC860T CS2*/GPCM

Network support:
MAC : MPC86OT FEC (Fast Ethernet Controller)
PHY : Intel LXT971A
MII Addr: 0x0 (hardwired on the board)
MII IRQ :

Console:
RS-232 on SMC1 (Maxim MAX3232 LVCMOS-RS232 level shifter)

Real Time Clock:
Type : Low power, I2C interface
Chip : Maxim DS1337
CS : Address 0x68 on I2C bus

The MPC860T's internal RTC has a defect in Mask rev D that increases
the current drain on the KAPWR line to 10 mA. Since this is an
unreasonable amount of current draw for a RTC, and Motorola does not
plan to fix this in future mask revisions, a serial (I2C) RTC that
works has been included instead. NOTE that the DS1337 can be
configured to output a 32768 Hz clock while the main power is on.
This clock output has been routed to the MPC860T's EXTAL pin to allow
the internal RTC to be used. NOTE also that due to yet another
defect in the rev D mask, the RTC does not operate reliably when the
internal RTC divisor is set to use a 32768 Hz reference. So just use
the I2C RTC.

Miscellaneous:
Xilinx Virtex FPGA on CS3*/GPCM.
Virtex FPGA slave SelectMap interface on cs4*/UPMB.
Mil-Std 1553 databus interface on CS5*/GPCM.
Audio sounder (beeper) with digital volume control connected to SPKROUT.

SC variant:
A reduced-feature version of the GEN860T port is also supported: GEN860T_SC.
The 'SC' variant only provides support for the Virtex FPGA, SDRAM main
memory, EEPROM and flash memory. The system clock frequency is reduced
to 24 MHz.

Issues:
The DOC 2000+ returns 0x40 as its device ID when probed using the method
desxribed in the DOC datasheet. Unfortunately, the U-Boot DOC driver
does not recognize this device. As of this writing, it seems that MTD
does not support the DOC 2000+ either.

Status:
Everything appears to work except DOC support. As of this writing,
David Woodhouse has stated on the MTD mailing list that he has no
knowledge of the DOC Millineum Plus and therfore there is no support
in MTD for this device. I wish I had known this sooner :(

The GEN860T board specific files and configuration is based on the work
of others who have contributed to U-Boot. The copyright and license notices
of these authors have been retained wherever their code has been reused.
All new code to support the GEN860T board is:

(C) Copyright 2001-2003
Keith Outwater (keith_outwater@mvis.com)

and the following license applies:

This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 2 of
the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful,
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston,
MA 02111-1307 USA

Thanks to Wolfgang Denk for a great software package and to everyone
who contributed to its development.

Keith Outwater
Sr. Staff Engineer
Microvision, Inc.
<keith_outwater@mvis.com>
<outwater@eskimo.com>

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