upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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177 lines
4.5 KiB
177 lines
4.5 KiB
/*
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* Common configuration settings for IGEP technology based boards
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*
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* (C) Copyright 2012
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* ISEE 2007 SL, <www.iseebcn.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __IGEP00X0_H
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#define __IGEP00X0_H
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#ifdef CONFIG_BOOT_NAND
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#define CONFIG_NAND
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#endif
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#define CONFIG_NR_DRAM_BANKS 2
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#include <configs/ti_omap3_common.h>
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#include <asm/mach-types.h>
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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#define CONFIG_MISC_INIT_R
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#define CONFIG_REVISION_TAG 1
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/* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
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#if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032)
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#define CONFIG_STATUS_LED
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#define CONFIG_BOARD_SPECIFIC_LED
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#define CONFIG_GPIO_LED
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#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
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#define RED_LED_GPIO 27
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#elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
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#define RED_LED_GPIO 16
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#else
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#error "status LED not defined for this machine."
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#endif
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#define RED_LED_DEV 0
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#define STATUS_LED_BIT RED_LED_GPIO
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#define STATUS_LED_STATE STATUS_LED_ON
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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#define STATUS_LED_BOOT RED_LED_DEV
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#endif
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/* GPIO banks */
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#define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */
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#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
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#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
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/* USB */
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#define CONFIG_USB_MUSB_UDC 1
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#define CONFIG_USB_OMAP3 1
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#define CONFIG_TWL4030_USB 1
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/* USB device configuration */
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#define CONFIG_USB_DEVICE 1
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#define CONFIG_USB_TTY 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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/* Change these to suit your needs */
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#define CONFIG_USBD_VENDORID 0x0451
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#define CONFIG_USBD_PRODUCTID 0x5678
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#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
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#define CONFIG_USBD_PRODUCT_NAME "IGEP"
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#define CONFIG_CMD_CACHE
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#ifdef CONFIG_BOOT_ONENAND
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#define CONFIG_CMD_ONENAND /* ONENAND support */
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#endif
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#ifndef CONFIG_SPL_BUILD
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/* Environment */
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#define ENV_DEVICE_SETTINGS \
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"stdin=serial\0" \
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"stdout=serial\0" \
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"stderr=serial\0"
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#define MEM_LAYOUT_SETTINGS \
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DEFAULT_LINUX_BOOT_ENV \
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"scriptaddr=0x87E00000\0" \
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"pxefile_addr_r=0x87F00000\0"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_DEVICE_SETTINGS \
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MEM_LAYOUT_SETTINGS \
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BOOTENV
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#endif
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/*
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* FLASH and environment organization
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*/
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#ifdef CONFIG_BOOT_ONENAND
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#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
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#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_ENV_IS_IN_ONENAND 1
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#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
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#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
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#endif
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#ifdef CONFIG_NAND
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#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
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#define CONFIG_ENV_ADDR NAND_ENV_OFFSET
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#endif
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/*
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* SMSC911x Ethernet
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*/
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#if defined(CONFIG_CMD_NET)
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_32_BIT
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#define CONFIG_SMC911X_BASE 0x2C000000
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#endif /* (CONFIG_CMD_NET) */
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/* OneNAND boot config */
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#ifdef CONFIG_BOOT_ONENAND
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#define CONFIG_SPL_ONENAND_SUPPORT
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#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
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#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
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#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
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#define CONFIG_SPL_ONENAND_LOAD_SIZE \
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(512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
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#endif
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/* NAND boot config */
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#ifdef CONFIG_NAND
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#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, \
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18, 19, 20, 21, 22, 23, 24, 25, \
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26, 27, 28, 29, 30, 31, 32, 33, \
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34, 35, 36, 37, 38, 39, 40, 41, \
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42, 43, 44, 45, 46, 47, 48, 49, \
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50, 51, 52, 53, 54, 55, 56, 57, }
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_BCH
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_CMD_SPL_NAND_OFS 0x240000
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif
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#endif /* __IGEP00X0_H */
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