upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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118 lines
2.6 KiB
118 lines
2.6 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
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*
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* Copyright (C) 2006 Micronas GmbH
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*/
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#include <common.h>
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#include <command.h>
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#include <netdev.h>
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#include <asm/mipsregs.h>
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#include "vct.h"
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#if defined(CONFIG_VCT_PREMIUM)
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#define BOARD_NAME "PremiumD"
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#elif defined(CONFIG_VCT_PLATINUM)
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#define BOARD_NAME "PlatinumD"
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#elif defined(CONFIG_VCT_PLATINUMAVC)
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#define BOARD_NAME "PlatinumAVC"
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#else
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#error "vct: No board variant defined!"
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#endif
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#if defined(CONFIG_VCT_ONENAND)
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#define BOARD_NAME_ADD " OneNAND"
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#else
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#define BOARD_NAME_ADD " NOR"
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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{
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/*
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* First initialize the PIN mulitplexing
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*/
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vct_pin_mux_initialize();
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/*
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* Init the EBI very early so that FLASH can be accessed
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*/
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ebi_initialize();
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return 0;
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}
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void _machine_restart(void)
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{
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reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT);
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reg_write(WDT_TORR(WDT_BASE), 0x00);
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reg_write(WDT_CR(WDT_BASE), 0x1D);
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/*
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* Now wait for the watchdog to trigger the reset
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*/
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udelay(1000000);
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}
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/*
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* SDRAM is already configured by the bootstrap code, only return the
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* auto-detected size here
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*/
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_MBYTES_SDRAM << 20);
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return 0;
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}
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int checkboard(void)
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{
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char buf[64];
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int i = env_get_f("serial#", buf, sizeof(buf));
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u32 config0 = read_c0_prid();
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if ((config0 & 0xff0000) == PRID_COMP_LEGACY
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&& (config0 & 0xff00) == PRID_IMP_LX4280) {
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puts("Board: MDED \n");
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printf("CPU: LX4280 id: 0x%02x, rev: 0x%02x\n",
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(config0 >> 8) & 0xFF, config0 & 0xFF);
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} else if ((config0 & 0xff0000) == PRID_COMP_MIPS
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&& (config0 & 0xff00) == PRID_IMP_VGC) {
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u32 jedec_id = *((u32 *) 0xBEBC71A0);
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if ((((jedec_id) >> 12) & 0xFF) == 0x40) {
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puts("Board: VGCA \n");
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} else if ((((jedec_id) >> 12) & 0xFF) == 0x48
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|| (((jedec_id) >> 12) & 0xFF) == 0x49) {
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puts("Board: VGCB \n");
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}
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printf("CPU: MIPS 4K id: 0x%02x, rev: 0x%02x\n",
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(config0 >> 8) & 0xFF, config0 & 0xFF);
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} else if (config0 == 0x19378) {
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printf("CPU: MIPS 24K id: 0x%02x, rev: 0x%02x\n",
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(config0 >> 8) & 0xFF, config0 & 0xFF);
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} else {
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printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24,
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config0);
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}
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printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD);
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if (i > 0) {
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puts(", serial# ");
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puts(buf);
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}
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putc('\n');
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC911X
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rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
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#endif
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return rc;
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}
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