upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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289 lines
7.2 KiB
289 lines
7.2 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*/
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#include <common.h>
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#include <dm.h>
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#include <environment.h>
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#include <misc.h>
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#include <spl.h>
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#include <syscon.h>
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#include <usb.h>
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#include <dm/pinctrl.h>
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#include <dm/uclass-internal.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/setup.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/cru_rk3399.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/grf_rk3399.h>
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#include <asm/arch/periph.h>
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#include <power/regulator.h>
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#include <u-boot/sha256.h>
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int board_init(void)
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{
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int ret;
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/*
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* We need to call into regulators_enable_boot_on() again, as the call
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* during SPL may have not included all regulators.
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*/
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ret = regulators_enable_boot_on(false);
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if (ret)
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debug("%s: Cannot enable boot on regulator\n", __func__);
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return 0;
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}
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static void rk3399_force_power_on_reset(void)
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{
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ofnode node;
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struct gpio_desc sysreset_gpio;
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debug("%s: trying to force a power-on reset\n", __func__);
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node = ofnode_path("/config");
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if (!ofnode_valid(node)) {
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debug("%s: no /config node?\n", __func__);
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return;
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}
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if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0,
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&sysreset_gpio, GPIOD_IS_OUT)) {
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debug("%s: could not find a /config/sysreset-gpio\n", __func__);
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return;
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}
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dm_gpio_set_value(&sysreset_gpio, 1);
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}
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void spl_board_init(void)
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{
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int ret;
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struct rk3399_cru *cru = rockchip_get_cru();
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/*
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* The RK3399 resets only 'almost all logic' (see also in the TRM
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* "3.9.4 Global software reset"), when issuing a software reset.
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* This may cause issues during boot-up for some configurations of
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* the application software stack.
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*
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* To work around this, we test whether the last reset reason was
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* a power-on reset and (if not) issue an overtemp-reset to reset
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* the entire module.
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*
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* While this was previously fixed by modifying the various places
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* that could generate a software reset (e.g. U-Boot's sysreset
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* driver, the ATF or Linux), we now have it here to ensure that
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* we no longer have to track this through the various components.
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*/
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if (cru->glb_rst_st != 0)
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rk3399_force_power_on_reset();
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/*
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* Turning the eMMC and SPI back on (if disabled via the Qseven
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* BIOS_ENABLE) signal is done through a always-on regulator).
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*/
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ret = regulators_enable_boot_on(false);
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if (ret)
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debug("%s: Cannot enable boot on regulator\n", __func__);
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preloader_console_init();
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}
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static void setup_macaddr(void)
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{
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#if CONFIG_IS_ENABLED(CMD_NET)
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int ret;
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const char *cpuid = env_get("cpuid#");
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u8 hash[SHA256_SUM_LEN];
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int size = sizeof(hash);
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u8 mac_addr[6];
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/* Only generate a MAC address, if none is set in the environment */
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if (env_get("ethaddr"))
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return;
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if (!cpuid) {
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debug("%s: could not retrieve 'cpuid#'\n", __func__);
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return;
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}
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ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
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if (ret) {
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debug("%s: failed to calculate SHA256\n", __func__);
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return;
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}
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/* Copy 6 bytes of the hash to base the MAC address on */
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memcpy(mac_addr, hash, 6);
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/* Make this a valid MAC address and set it */
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mac_addr[0] &= 0xfe; /* clear multicast bit */
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mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
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eth_env_set_enetaddr("ethaddr", mac_addr);
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#endif
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}
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static void setup_serial(void)
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{
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#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
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const u32 cpuid_offset = 0x7;
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const u32 cpuid_length = 0x10;
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struct udevice *dev;
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int ret, i;
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u8 cpuid[cpuid_length];
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u8 low[cpuid_length/2], high[cpuid_length/2];
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char cpuid_str[cpuid_length * 2 + 1];
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u64 serialno;
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char serialno_str[17];
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/* retrieve the device */
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ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_GET_DRIVER(rockchip_efuse), &dev);
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if (ret) {
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debug("%s: could not find efuse device\n", __func__);
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return;
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}
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/* read the cpu_id range from the efuses */
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ret = misc_read(dev, cpuid_offset, &cpuid, sizeof(cpuid));
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if (ret) {
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debug("%s: reading cpuid from the efuses failed\n",
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__func__);
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return;
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}
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memset(cpuid_str, 0, sizeof(cpuid_str));
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for (i = 0; i < 16; i++)
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sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
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debug("cpuid: %s\n", cpuid_str);
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/*
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* Mix the cpuid bytes using the same rules as in
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* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
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*/
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for (i = 0; i < 8; i++) {
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low[i] = cpuid[1 + (i << 1)];
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high[i] = cpuid[i << 1];
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}
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serialno = crc32_no_comp(0, low, 8);
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serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
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snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
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env_set("cpuid#", cpuid_str);
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env_set("serial#", serialno_str);
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#endif
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}
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static void setup_iodomain(void)
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{
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const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3;
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struct rk3399_grf_regs *grf =
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syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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/*
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* Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6).
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* Linux assumes that PCIE_RST# works out of the box as it probes
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* PCIe before loading the iodomain driver.
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*/
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rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
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}
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int misc_init_r(void)
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{
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setup_serial();
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setup_macaddr();
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setup_iodomain();
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return 0;
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}
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#ifdef CONFIG_SERIAL_TAG
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void get_board_serial(struct tag_serialnr *serialnr)
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{
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char *serial_string;
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u64 serial = 0;
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serial_string = env_get("serial#");
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if (serial_string)
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serial = simple_strtoull(serial_string, NULL, 16);
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serialnr->high = (u32)(serial >> 32);
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serialnr->low = (u32)(serial & 0xffffffff);
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}
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#endif
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/**
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* Switch power at an external regulator (for our root hub).
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*
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* @param ctrl pointer to the xHCI controller
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* @param port port number as in the control message (one-based)
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* @param enable boolean indicating whether to enable or disable power
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* @return returns 0 on success, an error-code on failure
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*/
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static int board_usb_port_power_set(struct udevice *dev, int port,
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bool enable)
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{
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#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_REGULATOR)
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/* We start counting ports at 0, while USB counts from 1. */
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int index = port - 1;
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const char *regname = NULL;
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struct udevice *regulator;
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const char *prop = "tsd,usb-port-power";
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int ret;
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debug("%s: ctrl '%s' port %d enable %s\n", __func__,
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dev_read_name(dev), port, enable ? "true" : "false");
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ret = dev_read_string_index(dev, prop, index, ®name);
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if (ret < 0) {
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debug("%s: ctrl '%s' port %d: no entry in '%s'\n",
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__func__, dev_read_name(dev), port, prop);
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return ret;
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}
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ret = regulator_get_by_platname(regname, ®ulator);
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if (ret) {
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debug("%s: ctrl '%s' port %d: could not get regulator '%s'\n",
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__func__, dev_read_name(dev), port, regname);
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return ret;
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}
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regulator_set_enable(regulator, enable);
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return 0;
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#else
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return -ENOTSUPP;
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#endif
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}
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void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
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{
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struct udevice *dev = hub->pusb_dev->dev;
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struct udevice *ctrl;
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/* We are only interested in our root-hubs */
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if (usb_hub_is_root_hub(dev) == false)
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return;
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ctrl = usb_get_bus(dev);
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if (!ctrl) {
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debug("%s: could not retrieve ctrl for hub\n", __func__);
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return;
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}
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/*
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* To work around an incompatibility between the single-threaded
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* USB stack in U-Boot and (a strange low-power mode of) the USB
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* hub we have on-module, we need to delay powering on the hub
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* until the first time the port is probed.
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*/
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board_usb_port_power_set(ctrl, port, true);
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}
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