upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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155 lines
3.7 KiB
155 lines
3.7 KiB
/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include "high_speed_env_spec.h"
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#include "sys_env_lib.h"
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u8 selectors_serdes_rev1_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = {
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/* 0 1 2 3 4 5 */
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{0x1, 0x1, NA, NA, NA, NA}, /* PEX0 */
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{NA, 0x2, 0x1, NA, 0x1, NA}, /* PEX1 */
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{NA, NA, 0x2, NA, NA, 0x1}, /* PEX2 */
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{NA, NA, NA, 0x1, NA, NA}, /* PEX3 */
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{0x2, 0x3, NA, NA, NA, NA}, /* SATA0 */
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{NA, NA, 0x3, NA, 0x2, NA}, /* SATA1 */
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{NA, NA, NA, NA, 0x6, 0x2}, /* SATA2 */
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{NA, NA, NA, 0x3, NA, NA}, /* SATA3 */
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{0x3, 0x4, NA, NA, NA, NA}, /* SGMII0 */
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{NA, 0x5, 0x4, NA, 0x3, NA}, /* SGMII1 */
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{NA, NA, NA, 0x4, NA, 0x3}, /* SGMII2 */
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{NA, 0x7, NA, NA, NA, NA}, /* QSGMII */
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{NA, 0x6, NA, NA, 0x4, NA}, /* USB3_HOST0 */
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{NA, NA, NA, 0x5, NA, 0x4}, /* USB3_HOST1 */
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{NA, NA, NA, 0x6, 0x5, 0x5}, /* USB3_DEVICE */
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{0x0, 0x0, 0x0, 0x0, 0x0, 0x0} /* DEFAULT_SERDES */
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};
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int hws_serdes_seq_init(void)
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{
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DEBUG_INIT_FULL_S("\n### serdes_seq_init ###\n");
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if (hws_serdes_seq_db_init() != MV_OK) {
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printf("hws_serdes_seq_init: Error: Serdes initialization fail\n");
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return MV_FAIL;
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}
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return MV_OK;
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}
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int serdes_power_up_ctrl_ext(u32 serdes_num, int serdes_power_up,
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enum serdes_type serdes_type,
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enum serdes_speed baud_rate,
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enum serdes_mode serdes_mode,
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enum ref_clock ref_clock)
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{
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return MV_NOT_SUPPORTED;
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}
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u32 hws_serdes_silicon_ref_clock_get(void)
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{
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DEBUG_INIT_FULL_S("\n### hws_serdes_silicon_ref_clock_get ###\n");
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return REF_CLOCK_25MHZ;
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}
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u32 hws_serdes_get_max_lane(void)
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{
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switch (sys_env_device_id_get()) {
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case MV_6811: /* A381/A3282: 6811/6821: single/dual cpu */
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return 4;
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case MV_6810:
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return 5;
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case MV_6820:
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case MV_6828:
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return 6;
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default: /* not the right module */
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printf("%s: Device ID Error, using 4 SerDes lanes\n",
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__func__);
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return 4;
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}
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return 6;
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}
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int hws_is_serdes_active(u8 lane_num)
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{
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int ret = 1;
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/* Maximum lane count for A388 (6828) is 6 */
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if (lane_num > 6)
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ret = 0;
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/* 4th Lane (#4 on Device 6810 is not Active */
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if (sys_env_device_id_get() == MV_6810 && lane_num == 4) {
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printf("%s: Error: Lane#4 on Device 6810 is not Active.\n",
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__func__);
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return 0;
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}
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/*
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* 6th Lane (#5) on Device 6810 is Active, even though 6810
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* has only 5 lanes
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*/
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if (sys_env_device_id_get() == MV_6810 && lane_num == 5)
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return 1;
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if (lane_num >= hws_serdes_get_max_lane())
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ret = 0;
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return ret;
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}
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int hws_get_ext_base_addr(u32 serdes_num, u32 base_addr, u32 unit_base_offset,
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u32 *unit_base_reg, u32 *unit_offset)
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{
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*unit_base_reg = base_addr;
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*unit_offset = unit_base_offset;
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return MV_OK;
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}
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/*
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* hws_serdes_get_phy_selector_val
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*
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* DESCRIPTION: Get the mapping of Serdes Selector values according to the
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* Serdes revision number
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* INPUT: serdes_num - Serdes number
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* serdes_type - Serdes type
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* OUTPUT: None
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* RETURN:
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* Mapping of Serdes Selector values
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*/
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u32 hws_serdes_get_phy_selector_val(int serdes_num,
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enum serdes_type serdes_type)
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{
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if (serdes_type >= LAST_SERDES_TYPE)
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return 0xff;
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if (hws_ctrl_serdes_rev_get() == MV_SERDES_REV_1_2) {
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return selectors_serdes_rev1_map
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[serdes_type][serdes_num];
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} else
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return selectors_serdes_rev2_map
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[serdes_type][serdes_num];
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}
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u32 hws_get_physical_serdes_num(u32 serdes_num)
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{
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if ((serdes_num == 4) && (sys_env_device_id_get() == MV_6810)) {
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/*
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* For 6810, there are 5 Serdes and Serdes Num 4 doesn't
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* exist. Instead Serdes Num 5 is connected.
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*/
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return 5;
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} else {
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return serdes_num;
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}
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}
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