upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Paul Burton 639200f6a0 MIPS: Ensure cache ops complete in mips_cache_reset ... Ensure that cache operations complete before returning from mips_cache_reset by placing a completion barrier (sync instruction) before the return. Without this there is no guarantee that the cache ops will complete before any subsequent memory accesses, since they are indexed cache ops & thus not implicitly ordered with memory accesses. Signed-off-by: Paul Burton <paul.burton@imgtec.com>		8 years ago
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Makefile	MIPS: Support dynamic I/O port base address	9 years ago
ashldi3.c	…
ashrdi3.c	…
bootm.c	libfdt: Introduce new ARCH_FIXUP_FDT option	9 years ago
cache.c	MIPS: L2 cache support	8 years ago
cache_init.S	MIPS: Ensure cache ops complete in mips_cache_reset	8 years ago
libgcc.h	…
lshrdi3.c	…