upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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116 lines
1.8 KiB
116 lines
1.8 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#include <common.h>
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/*
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* CPU test
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* Integer compare instructions: cmpw, cmplw
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*
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* To verify these instructions the test runs them with
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* different combinations of operands, reads the condition
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* register value and compares it with the expected one.
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* The test contains a pre-built table
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* containing the description of each test case: the instruction,
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* the values of the operands, the condition field to save
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* the result in and the expected result.
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*/
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#include <post.h>
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#include "cpu_asm.h"
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#if CONFIG_POST & CONFIG_SYS_POST_CPU
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extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2);
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static struct cpu_post_cmp_s
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{
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ulong cmd;
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ulong op1;
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ulong op2;
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ulong cr;
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ulong res;
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} cpu_post_cmp_table[] =
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{
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{
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OP_CMPW,
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123,
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123,
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2,
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0x02
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},
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{
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OP_CMPW,
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123,
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133,
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3,
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0x08
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},
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{
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OP_CMPW,
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123,
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-133,
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4,
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0x04
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},
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{
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OP_CMPLW,
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123,
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123,
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2,
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0x02
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},
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{
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OP_CMPLW,
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123,
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-133,
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3,
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0x08
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},
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{
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OP_CMPLW,
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123,
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113,
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4,
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0x04
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},
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};
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static unsigned int cpu_post_cmp_size = ARRAY_SIZE(cpu_post_cmp_table);
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int cpu_post_test_cmp (void)
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{
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int ret = 0;
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unsigned int i;
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int flag = disable_interrupts();
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for (i = 0; i < cpu_post_cmp_size && ret == 0; i++)
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{
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struct cpu_post_cmp_s *test = cpu_post_cmp_table + i;
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unsigned long code[] =
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{
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ASM_2C(test->cmd, test->cr, 3, 4),
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ASM_MFCR(3),
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ASM_BLR
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};
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ulong res;
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cpu_post_exec_12 (code, & res, test->op1, test->op2);
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ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1;
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if (ret != 0)
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{
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post_log ("Error at cmp test %d !\n", i);
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}
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}
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if (flag)
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enable_interrupts();
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return ret;
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}
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#endif
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