upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
70 lines
1.8 KiB
70 lines
1.8 KiB
/*-
|
|
* Copyright (c) 2007-2008, Juniper Networks, Inc.
|
|
* All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation version 2 of
|
|
* the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
* MA 02111-1307 USA
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <pci.h>
|
|
#include <usb.h>
|
|
|
|
#include "ehci.h"
|
|
#include "ehci-core.h"
|
|
|
|
#ifdef CONFIG_PCI_EHCI_DEVICE
|
|
static struct pci_device_id ehci_pci_ids[] = {
|
|
/* Please add supported PCI EHCI controller ids here */
|
|
{0x1033, 0x00E0},
|
|
{0, 0}
|
|
};
|
|
#endif
|
|
|
|
/*
|
|
* Create the appropriate control structures to manage
|
|
* a new EHCI host controller.
|
|
*/
|
|
int ehci_hcd_init(void)
|
|
{
|
|
pci_dev_t pdev;
|
|
uint32_t addr;
|
|
|
|
pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
|
|
if (pdev == -1) {
|
|
printf("EHCI host controller not found\n");
|
|
return -1;
|
|
}
|
|
|
|
pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &addr);
|
|
hccr = (struct ehci_hccr *)addr;
|
|
hcor = (struct ehci_hcor *)((uint32_t) hccr +
|
|
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
|
|
|
|
debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
|
|
(uint32_t)hccr, (uint32_t)hcor,
|
|
(uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Destroy the appropriate control structures corresponding
|
|
* the the EHCI host controller.
|
|
*/
|
|
int ehci_hcd_stop(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|