upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

Stefan Roese b2e2142c50 POST: Execute SPR test after relocation ... On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses self modifying code and this doesn't work with stack in d-cache, since I can't move the code from d-cache to i-cache. We move the SPR test to be executed a little later, after relocation. Then stack is located in SDRAM and this self-modifying code is no problem anymore. Signed-off-by: Stefan Roese <sr@denx.de>		17 years ago
..
board	ppc4xx: Fix lwmon5 compilation problem	18 years ago
cpu	Cosmetic changes to ECC POST for AMCC Denali core	18 years ago
drivers	POST: limit memory test area to not touch global data anymore	18 years ago
lib_ppc	ppc4xx: Enable CPU POST test for 4xx with dcache enabled	18 years ago
Makefile	…
post.c	…
rules.mk	…
tests.c	POST: Execute SPR test after relocation	17 years ago