upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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69 lines
1.3 KiB
69 lines
1.3 KiB
/*
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* Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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* Copyright (C) 2011 Renesas Solutions Corp.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <netdev.h>
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#include <i2c.h>
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#define MODEMR (0xFFCC0020)
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#define MODEMR_MASK (0x6)
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#define MODEMR_533MHZ (0x2)
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int checkboard(void)
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{
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u32 r = readl(MODEMR);
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if ((r & MODEMR_MASK) & MODEMR_533MHZ)
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puts("CPU Clock: 533MHz\n");
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else
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puts("CPU Clock: 400MHz\n");
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puts("BOARD: Renesas Technology Corp. R0P7734C00000RZ\n");
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return 0;
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}
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#define MSTPSR1 (0xFFC80044)
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#define MSTPCR1 (0xFFC80034)
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#define MSTPSR1_GETHER (1 << 14)
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int board_init(void)
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{
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#if defined(CONFIG_SH_ETHER)
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u32 r = readl(MSTPSR1);
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if (r & MSTPSR1_GETHER)
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writel((r & ~MSTPSR1_GETHER), MSTPCR1);
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#endif
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return 0;
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}
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int board_late_init(void)
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{
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u8 mac[6];
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/* Read Mac Address and set*/
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(CONFIG_SYS_I2C_MODULE);
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/* Read MAC address */
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i2c_read(0x50, 0x10, 0, mac, 6);
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if (is_valid_ethaddr(mac))
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eth_setenv_enetaddr("ethaddr", mac);
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return 0;
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}
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#ifdef CONFIG_SMC911X
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
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return rc;
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}
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#endif
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