upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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168 lines
6.5 KiB
168 lines
6.5 KiB
/*
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* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*------------------------------------------------------------------------
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* BOARD/CPU -- TOP-LEVEL
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*----------------------------------------------------------------------*/
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#define CONFIG_NIOS 1 /* NIOS-32 core */
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#define CONFIG_DK1C20 1 /* Cyclone DK-1C20 board*/
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#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clock */
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/*------------------------------------------------------------------------
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* BASE ADDRESSES
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*----------------------------------------------------------------------*/
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#define CFG_FLASH_BASE 0x00000000 /* Flash memory base */
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#define CFG_SRAM_BASE 0x00800000 /* External SRAM */
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#define CFG_SRAM_SIZE 0x00100000 /* 1 MByte */
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#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
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#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
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#define CFG_VECT_BASE 0x008fff00 /* Vector table addr */
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/*------------------------------------------------------------------------
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* MEMORY ORGANIZATION - For the most part, you can put things pretty
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* much anywhere. This is pretty flexible for Nios. So here we make some
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* arbitrary choices & assume that the monitor is placed at the end of
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* a memory resource (so you must make sure TEXT_BASE is chosen
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* appropriately).
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*
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* -The heap is placed below the monitor.
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* -Global data is placed below the heap.
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* -The stack is placed below global data (&grows down).
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*----------------------------------------------------------------------*/
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#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */
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#define CFG_ENV_SIZE 0x10000 /* 64 KByte (1 sector) */
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#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
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#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE -CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
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/*------------------------------------------------------------------------
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* FLASH
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*----------------------------------------------------------------------*/
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#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
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#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
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#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
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#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
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/*------------------------------------------------------------------------
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* ENVIRONMENT
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*----------------------------------------------------------------------*/
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#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
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#define CFG_ENV_ADDR 0x00000000 /* Mem addr of env */
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#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */
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/*------------------------------------------------------------------------
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* CONSOLE
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*----------------------------------------------------------------------*/
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#define CFG_NIOS_CONSOLE 0x00920900 /* Cons uart base addr */
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#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_BAUDRATE 115200
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/*------------------------------------------------------------------------
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* TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT,
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* so an avalon bus timer is required.
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*----------------------------------------------------------------------*/
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#define CFG_NIOS_TMRBASE 0x009209e0
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#define CFG_NIOS_TMRIRQ 50
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#define CFG_NIOS_TMRMS 10
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/*------------------------------------------------------------------------
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* Ethernet -- needs work!
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*----------------------------------------------------------------------*/
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#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
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#define CONFIG_SMC91111_BASE 0x00910300 /* Base address */
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#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
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#define CONFIG_SMC_USE_32_BIT /* 32-bit data rd/wr */
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#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 192.168.2.21
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#define CONFIG_SERVERIP 192.168.2.16
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/*------------------------------------------------------------------------
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* COMMANDS
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*----------------------------------------------------------------------*/
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#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
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CFG_CMD_ASKENV | \
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CFG_CMD_BEDBUG | \
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CFG_CMD_BMP | \
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CFG_CMD_BSP | \
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CFG_CMD_CACHE | \
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CFG_CMD_DATE | \
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CFG_CMD_DOC | \
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CFG_CMD_DTT | \
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CFG_CMD_EEPROM | \
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CFG_CMD_ELF | \
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CFG_CMD_FAT | \
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CFG_CMD_FDC | \
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CFG_CMD_FDOS | \
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CFG_CMD_HWFLOW | \
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CFG_CMD_IDE | \
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CFG_CMD_I2C | \
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CFG_CMD_JFFS2 | \
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CFG_CMD_KGDB | \
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CFG_CMD_NAND | \
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CFG_CMD_MMC | \
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CFG_CMD_MII | \
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CFG_CMD_PCI | \
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CFG_CMD_PCMCIA | \
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CFG_CMD_SCSI | \
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CFG_CMD_SPI | \
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CFG_CMD_VFD | \
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CFG_CMD_USB ) )
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#include <cmd_confdefs.h>
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/*------------------------------------------------------------------------
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* KGDB
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*----------------------------------------------------------------------*/
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 9600
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#endif
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/*------------------------------------------------------------------------
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* MISC
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*----------------------------------------------------------------------*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "==> " /* Monitor Command Prompt */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#undef CFG_CLKS_IN_HZ
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#define CFG_HZ 1000 /* decr freq: 1ms ticks */
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#define CFG_LOAD_ADDR 0x00800000 /* Default load address */
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#define CFG_MEMTEST_START 0x00000000
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#define CFG_MEMTEST_END 0x00000000
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#endif /* __CONFIG_H */
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