upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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337 lines
8.2 KiB
337 lines
8.2 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de
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*
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* Based on da850evm.c, original Copyrights follow:
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Based on da830evm.c. Original Copyrights follow:
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*
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* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*/
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#include <common.h>
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#include <i2c.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/mach-types.h>
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#include <asm/arch/hardware.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/io.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/gpio.h>
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#include "../../../drivers/video/da8xx-fb.h"
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DECLARE_GLOBAL_DATA_PTR;
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static const struct da8xx_panel lcd_panel = {
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/* Casio COM57H531x */
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.name = "Casio_COM57H531x",
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.width = 640,
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.height = 480,
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.hfp = 12,
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.hbp = 144,
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.hsw = 30,
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.vfp = 10,
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.vbp = 35,
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.vsw = 3,
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.pxl_clk = 25000000,
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.invert_pxl_clk = 0,
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};
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static const struct display_panel disp_panel = {
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QVGA,
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16,
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16,
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COLOR_ACTIVE,
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};
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static const struct lcd_ctrl_config lcd_cfg = {
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&disp_panel,
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.ac_bias = 255,
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.ac_bias_intrpt = 0,
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.dma_burst_sz = 16,
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.bpp = 16,
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.fdd = 255,
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.tft_alt_mode = 0,
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.stn_565_mode = 0,
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.mono_8bit_mode = 0,
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.invert_line_clock = 1,
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.invert_frm_clock = 1,
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.sync_edge = 0,
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.sync_ctrl = 1,
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.raster_order = 0,
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};
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/* SPI0 pin muxer settings */
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static const struct pinmux_config spi1_pins[] = {
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{ pinmux(5), 1, 1 },
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{ pinmux(5), 1, 2 },
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{ pinmux(5), 1, 4 },
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{ pinmux(5), 1, 5 }
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};
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/* I2C pin muxer settings */
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static const struct pinmux_config i2c_pins[] = {
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{ pinmux(4), 2, 2 },
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{ pinmux(4), 2, 3 }
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};
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/* UART0 pin muxer settings */
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static const struct pinmux_config uart_pins[] = {
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{ pinmux(3), 2, 7 },
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{ pinmux(3), 2, 6 },
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{ pinmux(3), 2, 4 },
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{ pinmux(3), 2, 5 }
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};
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#ifdef CONFIG_DRIVER_TI_EMAC
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#define HAS_RMII 1
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static const struct pinmux_config emac_pins[] = {
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{ pinmux(14), 8, 2 },
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{ pinmux(14), 8, 3 },
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{ pinmux(14), 8, 4 },
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{ pinmux(14), 8, 5 },
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{ pinmux(14), 8, 6 },
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{ pinmux(14), 8, 7 },
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{ pinmux(15), 8, 1 },
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{ pinmux(4), 8, 0 },
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{ pinmux(4), 8, 1 }
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};
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#endif
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#ifdef CONFIG_NAND_DAVINCI
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const struct pinmux_config nand_pins[] = {
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{ pinmux(7), 1, 0}, /* CS2 */
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{ pinmux(7), 0, 1}, /* CS3 in three state*/
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{ pinmux(7), 1, 4 }, /* EMA_WE */
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{ pinmux(7), 1, 5 }, /* EMA_OE */
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{ pinmux(9), 1, 0 }, /* EMA_D[7] */
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{ pinmux(9), 1, 1 }, /* EMA_D[6] */
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{ pinmux(9), 1, 2 }, /* EMA_D[5] */
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{ pinmux(9), 1, 3 }, /* EMA_D[4] */
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{ pinmux(9), 1, 4 }, /* EMA_D[3] */
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{ pinmux(9), 1, 5 }, /* EMA_D[2] */
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{ pinmux(9), 1, 6 }, /* EMA_D[1] */
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{ pinmux(9), 1, 7 }, /* EMA_D[0] */
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{ pinmux(12), 1, 5 }, /* EMA_A[2] */
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{ pinmux(12), 1, 6 }, /* EMA_A[1] */
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{ pinmux(6), 1, 0 } /* EMA_CLK */
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};
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#endif
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const struct pinmux_config gpio_pins[] = {
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{ pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
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{ pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
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{ pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
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{ pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */
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{ pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/
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};
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const struct pinmux_config lcd_pins[] = {
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{ pinmux(17), 2, 1 }, /* LCD_D_0 */
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{ pinmux(17), 2, 0 }, /* LCD_D_1 */
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{ pinmux(16), 2, 7 }, /* LCD_D_2 */
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{ pinmux(16), 2, 6 }, /* LCD_D_3 */
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{ pinmux(16), 2, 5 }, /* LCD_D_4 */
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{ pinmux(16), 2, 4 }, /* LCD_D_5 */
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{ pinmux(16), 2, 3 }, /* LCD_D_6 */
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{ pinmux(16), 2, 2 }, /* LCD_D_7 */
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{ pinmux(18), 2, 1 }, /* LCD_D_8 */
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{ pinmux(18), 2, 0 }, /* LCD_D_9 */
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{ pinmux(17), 2, 7 }, /* LCD_D_10 */
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{ pinmux(17), 2, 6 }, /* LCD_D_11 */
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{ pinmux(17), 2, 5 }, /* LCD_D_12 */
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{ pinmux(17), 2, 4 }, /* LCD_D_13 */
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{ pinmux(17), 2, 3 }, /* LCD_D_14 */
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{ pinmux(17), 2, 2 }, /* LCD_D_15 */
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{ pinmux(18), 2, 6 }, /* LCD_PCLK */
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{ pinmux(19), 2, 0 }, /* LCD_HSYNC */
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{ pinmux(19), 2, 1 }, /* LCD_VSYNC */
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{ pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
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};
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const struct pinmux_config halten_pin[] = {
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{ pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */
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};
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static const struct pinmux_resource pinmuxes[] = {
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#ifdef CONFIG_SPI_FLASH
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PINMUX_ITEM(spi1_pins),
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#endif
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PINMUX_ITEM(uart_pins),
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PINMUX_ITEM(i2c_pins),
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#ifdef CONFIG_NAND_DAVINCI
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PINMUX_ITEM(nand_pins),
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#endif
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#ifdef CONFIG_VIDEO
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PINMUX_ITEM(lcd_pins),
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#endif
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};
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static const struct lpsc_resource lpsc[] = {
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{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
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{ DAVINCI_LPSC_SPI1 }, /* Serial Flash */
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{ DAVINCI_LPSC_EMAC }, /* image download */
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{ DAVINCI_LPSC_UART0 }, /* console */
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{ DAVINCI_LPSC_GPIO },
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{ DAVINCI_LPSC_LCDC }, /* LCD */
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};
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int board_early_init_f(void)
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{
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/* PinMux for GPIO */
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if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
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return 1;
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/* Set DISP_ON high to enable LCD output*/
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gpio_direction_output(97, 1);
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/* Set the RESETOUTn low */
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gpio_direction_output(111, 0);
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/* Set U0_SW0 low for UART0 as console*/
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gpio_direction_output(106, 0);
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/* Set U0_SW1 low for UART0 as console*/
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gpio_direction_output(108, 0);
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/* Set LCD_B_PWR low to power down LCD Backlight*/
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gpio_direction_output(102, 0);
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irq_init();
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/*
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* NAND CS setup - cycle counts based on da850evm NAND timings in the
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* Linux kernel @ 25MHz EMIFA
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*/
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#ifdef CONFIG_NAND_DAVINCI
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writel((DAVINCI_ABCR_WSETUP(0) |
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DAVINCI_ABCR_WSTROBE(1) |
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DAVINCI_ABCR_WHOLD(0) |
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DAVINCI_ABCR_RSETUP(0) |
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DAVINCI_ABCR_RSTROBE(1) |
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DAVINCI_ABCR_RHOLD(0) |
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DAVINCI_ABCR_TA(0) |
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DAVINCI_ABCR_ASIZE_8BIT),
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&davinci_emif_regs->ab1cr); /* CS2 */
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#endif
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/*
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* Power on required peripherals
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* ARM does not have access by default to PSC0 and PSC1
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* assuming here that the DSP bootloader has set the IOPU
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* such that PSC access is available to ARM
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*/
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if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
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return 1;
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/* setup the SUSPSRC for ARM to control emulation suspend */
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writel(readl(&davinci_syscfg_regs->suspsrc) &
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~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
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DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
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DAVINCI_SYSCFG_SUSPSRC_UART0),
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&davinci_syscfg_regs->suspsrc);
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/* configure pinmux settings */
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if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
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return 1;
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#ifdef CONFIG_DRIVER_TI_EMAC
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if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
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return 1;
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davinci_emac_mii_mode_sel(HAS_RMII);
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#endif /* CONFIG_DRIVER_TI_EMAC */
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/* enable the console UART */
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writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
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DAVINCI_UART_PWREMU_MGMT_UTRST),
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&davinci_uart0_ctrl_regs->pwremu_mgmt);
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/*
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* Reconfigure the LCDC priority to the highest to ensure that
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* the throughput/latency requirements for the LCDC are met.
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*/
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writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
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&davinci_syscfg_regs->mstpri[2]);
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return 0;
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}
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/*
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* Do not overwrite the console
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* Use always serial for U-Boot console
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*/
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int overwrite_console(void)
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{
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return 1;
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}
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int board_init(void)
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{
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/* arch number of the board */
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gd->bd->bi_arch_number = MACH_TYPE_EA20;
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/* address of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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da8xx_video_init(&lcd_panel, &lcd_cfg, 16);
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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unsigned char buf[2];
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int ret;
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/* PinMux for HALTEN */
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if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
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return 1;
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/* Set HALTEN to high */
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gpio_direction_output(134, 1);
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/* Set fixed contrast settings for LCD via I2C potentiometer */
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buf[0] = 0x00;
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buf[1] = 0xd7;
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ret = i2c_write(0x2e, 6, 1, buf, 2);
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if (ret)
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puts("\nContrast Settings FAILED\n");
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/* Set LCD_B_PWR high to power up LCD Backlight*/
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gpio_set_value(102, 1);
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return 0;
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}
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#endif /* CONFIG_BOARD_LATE_INIT */
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#ifdef CONFIG_DRIVER_TI_EMAC
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/*
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* Initializes on-board ethernet controllers.
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*/
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int board_eth_init(bd_t *bis)
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{
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if (!davinci_emac_initialize()) {
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printf("Error: Ethernet init failed!\n");
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return -1;
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}
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/*
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* This board has a RMII PHY. However, the MDC line on the SOM
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* must not be disabled (there is no MII PHY on the
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* baseboard) via the GPIO2[6], because this pin
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* disables at the same time the SPI flash.
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*/
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return 0;
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}
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#endif /* CONFIG_DRIVER_TI_EMAC */
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