upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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144 lines
4.5 KiB
144 lines
4.5 KiB
/*
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* (C) Copyright 2004
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* Reinhard Meyer, EMK Elektronik GmbH
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* r.meyer@emk-elektronik.de
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* www.emk-elektronik.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*****************************************************************************
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* Date & Time support for internal RTC of MPC52xx
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*****************************************************************************/
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/*#define DEBUG*/
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#if defined(CONFIG_CMD_DATE)
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/*****************************************************************************
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* this structure should be defined in mpc5200.h ...
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*****************************************************************************/
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typedef struct rtc5200 {
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volatile ulong tsr; /* MBAR+0x800: time set register */
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volatile ulong dsr; /* MBAR+0x804: data set register */
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volatile ulong nysr; /* MBAR+0x808: new year and stopwatch register */
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volatile ulong aier; /* MBAR+0x80C: alarm and interrupt enable register */
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volatile ulong ctr; /* MBAR+0x810: current time register */
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volatile ulong cdr; /* MBAR+0x814: current data register */
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volatile ulong asir; /* MBAR+0x818: alarm and stopwatch interupt register */
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volatile ulong piber; /* MBAR+0x81C: periodic interrupt and bus error register */
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volatile ulong trdr; /* MBAR+0x820: test register/divides register */
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} RTC5200;
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#define RTC_SET 0x02000000
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#define RTC_PAUSE 0x01000000
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/*****************************************************************************
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* get time
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*****************************************************************************/
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int rtc_get (struct rtc_time *tmp)
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{
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RTC5200 *rtc = (RTC5200 *) (CFG_MBAR+0x800);
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ulong time, date, time2;
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/* read twice to avoid getting a funny time when the second is just changing */
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do {
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time = rtc->ctr;
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date = rtc->cdr;
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time2 = rtc->ctr;
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} while (time != time2);
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tmp->tm_year = date & 0xfff;
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tmp->tm_mon = (date >> 24) & 0xf;
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tmp->tm_mday = (date >> 16) & 0x1f;
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tmp->tm_wday = (date >> 21) & 7;
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/* sunday is 7 in 5200 but 0 in rtc_time */
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if (tmp->tm_wday == 7)
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tmp->tm_wday = 0;
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tmp->tm_hour = (time >> 16) & 0x1f;
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tmp->tm_min = (time >> 8) & 0x3f;
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tmp->tm_sec = time & 0x3f;
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debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return 0;
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}
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/*****************************************************************************
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* set time
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*****************************************************************************/
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int rtc_set (struct rtc_time *tmp)
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{
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RTC5200 *rtc = (RTC5200 *) (CFG_MBAR+0x800);
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ulong time, date, year;
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debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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time = (tmp->tm_hour << 16) | (tmp->tm_min << 8) | tmp->tm_sec;
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date = (tmp->tm_mon << 16) | tmp->tm_mday;
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if (tmp->tm_wday == 0)
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date |= (7 << 8);
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else
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date |= (tmp->tm_wday << 8);
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year = tmp->tm_year;
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/* mask unwanted bits that might show up when rtc_time is corrupt */
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time &= 0x001f3f3f;
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date &= 0x001f071f;
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year &= 0x00000fff;
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/* pause and set the RTC */
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rtc->nysr = year;
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rtc->dsr = date | RTC_PAUSE;
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udelay (1000);
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rtc->dsr = date | RTC_PAUSE | RTC_SET;
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udelay (1000);
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rtc->dsr = date | RTC_PAUSE;
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udelay (1000);
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rtc->dsr = date;
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udelay (1000);
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rtc->tsr = time | RTC_PAUSE;
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udelay (1000);
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rtc->tsr = time | RTC_PAUSE | RTC_SET;
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udelay (1000);
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rtc->tsr = time | RTC_PAUSE;
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udelay (1000);
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rtc->tsr = time;
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udelay (1000);
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return 0;
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}
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/*****************************************************************************
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* reset rtc circuit
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*****************************************************************************/
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void rtc_reset (void)
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{
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return; /* nothing to do */
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}
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#endif
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