upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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63 lines
1.2 KiB
63 lines
1.2 KiB
/*
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/io.h>
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#include <asm/arch/uart.h>
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#include <common.h>
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static struct rk_uart *uart_ptr;
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static void uart_wrtie_byte(char byte)
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{
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writel(byte, &uart_ptr->rbr);
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while (!(readl(&uart_ptr->lsr) & 0x40))
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;
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}
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void print(char *s)
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{
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while (*s) {
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if (*s == '\n')
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uart_wrtie_byte('\r');
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uart_wrtie_byte(*s);
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s++;
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}
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}
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void print_hex(unsigned int n)
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{
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int i;
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int temp;
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uart_wrtie_byte('0');
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uart_wrtie_byte('x');
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for (i = 8; i > 0; i--) {
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temp = (n >> (i - 1) * 4) & 0x0f;
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if (temp < 10)
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uart_wrtie_byte((char)(temp + '0'));
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else
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uart_wrtie_byte((char)(temp - 10 + 'a'));
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}
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uart_wrtie_byte('\n');
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uart_wrtie_byte('\r');
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}
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/*
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* TODO: since rk3036 only 4K sram to use in SPL, for saving space,
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* we implement uart driver this way, we should convert this to use
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* ns16550 driver in future, which support DEBUG_UART in the standard way
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*/
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void rk_uart_init(void *base)
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{
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uart_ptr = (struct rk_uart *)base;
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writel(0x83, &uart_ptr->lcr);
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writel(0x0d, &uart_ptr->rbr);
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writel(0x03, &uart_ptr->lcr);
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/* fifo enable, sfe is shadow register of FCR[0] */
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writel(0x01, &uart_ptr->sfe);
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}
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