upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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261 lines
8.3 KiB
261 lines
8.3 KiB
/*
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* (C) Copyright 2012, Stefano Babic <sbabic@denx.de>
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*
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* Copyright (C) 2010 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the MX53-EVK Freescale board.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* SOC type must be included before imx-regs.h */
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#define CONFIG_MX53
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx5x_pins.h>
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#define CONFIG_SYS_MX5_HCLK 24000000
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#define CONFIG_SYS_MX5_CLK32 32768
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_OF_LIBFDT
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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/* Enable GPIOs */
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#define CONFIG_MXC_GPIO
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/* UART */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
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/* MMC */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 1
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_DOS_PARTITION
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/* Ethernet on FEC */
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#define CONFIG_NET_MULTI
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#define CONFIG_MII
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x01
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#define CONFIG_PHY_ADDR CONFIG_FEC_MXC_PHYADDR
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#define CONFIG_RESET_PHY_R
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#define CONFIG_FEC_MXC_NO_ANEG
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#define CONFIG_ETHPRIME "FEC0"
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/* SPI */
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#define CONFIG_HARD_SPI
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#define CONFIG_MXC_SPI
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#define CONFIG_DEFAULT_SPI_BUS 1
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#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
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/* SPI FLASH - not used for environment */
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SPI_FLASH_CS (IOMUX_TO_GPIO(MX53_PIN_CSI0_D11) \
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<< 8) | 0
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SF_DEFAULT_SPEED 25000000
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_GPIO
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
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#define CONFIG_SYS_TEXT_BASE 0xf0001400 /* uboot in nor flash */
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "IMA3 MX53 U-Boot > "
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x70000000
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#define CONFIG_SYS_MEMTEST_END 0x10000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_CMDLINE_EDITING
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define MTDIDS_DEFAULT "nor0=f0000000.flash"
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/* FLASH and environment organization */
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#define CONFIG_SYS_FLASH_BASE 0xF0000000
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#define CONFIG_SYS_FLASH_CFI /* Flash is CFI conformant */
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#define CONFIG_FLASH_CFI_DRIVER /* Use the common driver */
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#define CONFIG_FLASH_CFI_MTD /* with MTD support */
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 1024
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
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CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_SECT_SIZE 0x20000
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
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CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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/*
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* Default environment and default scripts
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* to update uboot and load kernel
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*/
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#define HOSTNAME ima3-mx53
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#define CONFIG_HOSTNAME ima3-mx53
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram0 rw\0" \
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"addip_sta=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
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"addip=if test -n ${ipdyn};then run addip_dyn;" \
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"else run addip_sta;fi\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addtty=setenv bootargs ${bootargs}" \
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" console=${console},${baudrate}\0" \
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"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
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"console=ttymxc3\0" \
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"loadaddr=70800000\0" \
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"kernel_addr_r=70800000\0" \
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"ramdisk_addr_r=71000000\0" \
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"hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
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"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
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"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
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"mmcargs=setenv bootargs root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"mmcroot=/dev/mmcblk0p3 rw\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs addip addtty addmtd addmisc mmcload;" \
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"bootm\0" \
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"mmcload=fatload mmc ${mmcdev}:${mmcpart} " \
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"${loadaddr} ${uimage}\0" \
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"mmcrootfstype=ext3 rootwait\0" \
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"flash_self=run ramargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr}\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
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"run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr_r}\0" \
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"net_self_load=tftp ${ramdisk_addr_r} ${ramdisk_file};" \
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"tftp ${kernel_addr_r} ${bootfile}\0" \
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"net_self=if run net_self_load;then " \
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"run ramargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
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"else echo Images not loades;fi\0" \
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"satargs=setenv bootargs root=/dev/sda1\0" \
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"satafile=boot/uImage\0" \
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"ssdboot=echo Booting from ssd ...; " \
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"run satargs addip addtty addmtd addmisc;" \
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"sata init;ext2load sata 0:1 ${kernel_addr_r} " \
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"${satafile};bootm\0" \
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"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.imx\0" \
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"uimage=uImage\0" \
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"load=tftp ${loadaddr} ${u-boot}\0" \
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"uboot_addr=0xf0001000\0" \
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"update=protect off 0xf0000000 +60000;" \
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"erase ${uboot_addr} +60000;" \
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"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
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"upd=if run load;then echo Updating u-boot;if run update;" \
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"then echo U-Boot updated;" \
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"else echo Error updating u-boot !;" \
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"echo Board without bootloader !!;" \
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"fi;" \
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"else echo U-Boot not downloaded..exiting;fi\0" \
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"bootcmd=run net_nfs\0"
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#define CONFIG_CMD_SATA
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_DWC_AHSATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
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#define CONFIG_LBA48
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#define CONFIG_LIBATA
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#endif
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#endif /* __CONFIG_H */
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