upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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652 lines
18 KiB
652 lines
18 KiB
/*
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* Copyright (C) 2012 Samsung Electronics
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*
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* Author: InKi Dae <inki.dae@samsung.com>
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* Author: Donghwa Lee <dh09.lee@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/dsim.h>
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#include <asm/arch/mipi_dsim.h>
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#include <asm/arch/power.h>
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#include <asm/arch/cpu.h>
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#include "exynos_mipi_dsi_lowlevel.h"
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#include "exynos_mipi_dsi_common.h"
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void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = readl(&mipi_dsim->swrst);
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reg |= DSIM_FUNCRST;
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writel(reg, &mipi_dsim->swrst);
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}
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void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim)
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{
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unsigned int reg = 0;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = readl(&mipi_dsim->swrst);
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reg |= DSIM_SWRST;
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reg |= DSIM_FUNCRST;
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writel(reg, &mipi_dsim->swrst);
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}
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void exynos_mipi_dsi_sw_release(struct mipi_dsim_device *dsim)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = readl(&mipi_dsim->intsrc);
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reg |= INTSRC_SWRST_RELEASE;
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writel(reg, &mipi_dsim->intsrc);
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}
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void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim,
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unsigned int mode, unsigned int mask)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = readl(&mipi_dsim->intmsk);
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if (mask)
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reg |= mode;
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else
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reg &= ~mode;
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writel(reg, &mipi_dsim->intmsk);
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}
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void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim,
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unsigned int cfg)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = readl(&mipi_dsim->fifoctrl);
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writel(reg & ~(cfg), &mipi_dsim->fifoctrl);
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udelay(10 * 1000);
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reg |= cfg;
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writel(reg, &mipi_dsim->fifoctrl);
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}
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/*
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* this function set PLL P, M and S value in D-PHY
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*/
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void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,
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unsigned int value)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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writel(DSIM_AFC_CTL(value), &mipi_dsim->phyacchr);
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}
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void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim,
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unsigned int width_resol, unsigned int height_resol)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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/* standby should be set after configuration so set to not ready*/
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reg = (readl(&mipi_dsim->mdresol)) & ~(DSIM_MAIN_STAND_BY);
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writel(reg, &mipi_dsim->mdresol);
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/* reset resolution */
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reg &= ~(DSIM_MAIN_VRESOL(0x7ff) | DSIM_MAIN_HRESOL(0x7ff));
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reg |= DSIM_MAIN_VRESOL(height_resol) | DSIM_MAIN_HRESOL(width_resol);
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reg |= DSIM_MAIN_STAND_BY;
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writel(reg, &mipi_dsim->mdresol);
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}
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void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim,
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unsigned int cmd_allow, unsigned int vfront, unsigned int vback)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = (readl(&mipi_dsim->mvporch)) &
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~((DSIM_CMD_ALLOW_MASK) | (DSIM_STABLE_VFP_MASK) |
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(DSIM_MAIN_VBP_MASK));
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reg |= ((cmd_allow & 0xf) << DSIM_CMD_ALLOW_SHIFT) |
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((vfront & 0x7ff) << DSIM_STABLE_VFP_SHIFT) |
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((vback & 0x7ff) << DSIM_MAIN_VBP_SHIFT);
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writel(reg, &mipi_dsim->mvporch);
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}
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void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim,
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unsigned int front, unsigned int back)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = (readl(&mipi_dsim->mhporch)) &
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~((DSIM_MAIN_HFP_MASK) | (DSIM_MAIN_HBP_MASK));
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reg |= (front << DSIM_MAIN_HFP_SHIFT) | (back << DSIM_MAIN_HBP_SHIFT);
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writel(reg, &mipi_dsim->mhporch);
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}
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void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim,
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unsigned int vert, unsigned int hori)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = (readl(&mipi_dsim->msync)) &
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~((DSIM_MAIN_VSA_MASK) | (DSIM_MAIN_HSA_MASK));
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reg |= ((vert & 0x3ff) << DSIM_MAIN_VSA_SHIFT) |
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(hori << DSIM_MAIN_HSA_SHIFT);
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writel(reg, &mipi_dsim->msync);
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}
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void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim,
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unsigned int vert, unsigned int hori)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = (readl(&mipi_dsim->sdresol)) &
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~(DSIM_SUB_STANDY_MASK);
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writel(reg, &mipi_dsim->sdresol);
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reg &= ~(DSIM_SUB_VRESOL_MASK) | ~(DSIM_SUB_HRESOL_MASK);
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reg |= ((vert & 0x7ff) << DSIM_SUB_VRESOL_SHIFT) |
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((hori & 0x7ff) << DSIM_SUB_HRESOL_SHIFT);
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writel(reg, &mipi_dsim->sdresol);
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/* DSIM STANDBY */
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reg |= (1 << DSIM_SUB_STANDY_SHIFT);
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writel(reg, &mipi_dsim->sdresol);
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}
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void exynos_mipi_dsi_init_config(struct mipi_dsim_device *dsim)
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{
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struct mipi_dsim_config *dsim_config = dsim->dsim_config;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int cfg = (readl(&mipi_dsim->config)) &
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~((1 << DSIM_EOT_PACKET_SHIFT) |
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(0x1f << DSIM_HSA_MODE_SHIFT) |
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(0x3 << DSIM_NUM_OF_DATALANE_SHIFT));
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cfg |= (dsim_config->auto_flush << DSIM_AUTO_FLUSH_SHIFT) |
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(dsim_config->eot_disable << DSIM_EOT_PACKET_SHIFT) |
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(dsim_config->auto_vertical_cnt << DSIM_AUTO_MODE_SHIFT) |
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(dsim_config->hse << DSIM_HSE_MODE_SHIFT) |
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(dsim_config->hfp << DSIM_HFP_MODE_SHIFT) |
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(dsim_config->hbp << DSIM_HBP_MODE_SHIFT) |
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(dsim_config->hsa << DSIM_HSA_MODE_SHIFT) |
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(dsim_config->e_no_data_lane << DSIM_NUM_OF_DATALANE_SHIFT);
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writel(cfg, &mipi_dsim->config);
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}
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void exynos_mipi_dsi_display_config(struct mipi_dsim_device *dsim,
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struct mipi_dsim_config *dsim_config)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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u32 reg = (readl(&mipi_dsim->config)) &
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~((0x3 << DSIM_BURST_MODE_SHIFT) | (1 << DSIM_VIDEO_MODE_SHIFT)
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| (0x3 << DSIM_MAINVC_SHIFT) | (0x7 << DSIM_MAINPIX_SHIFT)
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| (0x3 << DSIM_SUBVC_SHIFT) | (0x7 << DSIM_SUBPIX_SHIFT));
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if (dsim_config->e_interface == DSIM_VIDEO)
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reg |= (1 << DSIM_VIDEO_MODE_SHIFT);
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else if (dsim_config->e_interface == DSIM_COMMAND)
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reg &= ~(1 << DSIM_VIDEO_MODE_SHIFT);
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else {
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printf("unknown lcd type.\n");
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return;
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}
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/* main lcd */
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reg |= ((u8) (dsim_config->e_burst_mode) & 0x3) << DSIM_BURST_MODE_SHIFT
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| ((u8) (dsim_config->e_virtual_ch) & 0x3) << DSIM_MAINVC_SHIFT
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| ((u8) (dsim_config->e_pixel_format) & 0x7) << DSIM_MAINPIX_SHIFT;
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writel(reg, &mipi_dsim->config);
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}
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void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim,
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unsigned int lane, unsigned int enable)
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{
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unsigned int reg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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reg = readl(&mipi_dsim->config);
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if (enable)
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reg |= DSIM_LANE_ENx(lane);
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else
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reg &= ~DSIM_LANE_ENx(lane);
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writel(reg, &mipi_dsim->config);
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}
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void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,
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unsigned int count)
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{
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unsigned int cfg;
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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/* get the data lane number. */
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cfg = DSIM_NUM_OF_DATA_LANE(count);
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writel(cfg, &mipi_dsim->config);
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}
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void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim,
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unsigned int enable, unsigned int afc_code)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = readl(&mipi_dsim->phyacchr);
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reg = 0;
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if (enable) {
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reg |= DSIM_AFC_EN;
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reg &= ~(0x7 << DSIM_AFC_CTL_SHIFT);
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reg |= DSIM_AFC_CTL(afc_code);
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} else
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reg &= ~DSIM_AFC_EN;
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writel(reg, &mipi_dsim->phyacchr);
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}
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void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim,
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unsigned int enable)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
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~(DSIM_PLL_BYPASS_EXTERNAL);
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reg |= enable << DSIM_PLL_BYPASS_SHIFT;
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writel(reg, &mipi_dsim->clkctrl);
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}
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void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim,
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unsigned int freq_band)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
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~(0x1f << DSIM_FREQ_BAND_SHIFT);
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reg |= ((freq_band & 0x1f) << DSIM_FREQ_BAND_SHIFT);
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writel(reg, &mipi_dsim->pllctrl);
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}
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void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim,
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unsigned int pre_divider, unsigned int main_divider,
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unsigned int scaler)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
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~(0x7ffff << 1);
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reg |= ((pre_divider & 0x3f) << DSIM_PREDIV_SHIFT) |
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((main_divider & 0x1ff) << DSIM_MAIN_SHIFT) |
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((scaler & 0x7) << DSIM_SCALER_SHIFT);
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writel(reg, &mipi_dsim->pllctrl);
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}
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void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim,
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unsigned int lock_time)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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writel(lock_time, &mipi_dsim->plltmr);
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}
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void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim,
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unsigned int enable)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
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~(0x1 << DSIM_PLL_EN_SHIFT);
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reg |= ((enable & 0x1) << DSIM_PLL_EN_SHIFT);
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writel(reg, &mipi_dsim->pllctrl);
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}
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void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim,
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unsigned int src)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
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~(0x3 << DSIM_BYTE_CLK_SRC_SHIFT);
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reg |= ((unsigned int) src) << DSIM_BYTE_CLK_SRC_SHIFT;
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writel(reg, &mipi_dsim->clkctrl);
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}
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void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim,
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unsigned int enable)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
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~(1 << DSIM_BYTE_CLKEN_SHIFT);
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reg |= enable << DSIM_BYTE_CLKEN_SHIFT;
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writel(reg, &mipi_dsim->clkctrl);
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}
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void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim,
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unsigned int enable, unsigned int prs_val)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
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~((1 << DSIM_ESC_CLKEN_SHIFT) | (0xffff));
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reg |= enable << DSIM_ESC_CLKEN_SHIFT;
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if (enable)
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reg |= prs_val;
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writel(reg, &mipi_dsim->clkctrl);
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}
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void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim,
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unsigned int lane_sel, unsigned int enable)
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{
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struct exynos_mipi_dsim *mipi_dsim =
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(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
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unsigned int reg = readl(&mipi_dsim->clkctrl);
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if (enable)
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reg |= DSIM_LANE_ESC_CLKEN(lane_sel);
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else
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reg &= ~DSIM_LANE_ESC_CLKEN(lane_sel);
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writel(reg, &mipi_dsim->clkctrl);
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}
|
|
|
|
void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim,
|
|
unsigned int enable)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (readl(&mipi_dsim->escmode)) &
|
|
~(0x1 << DSIM_FORCE_STOP_STATE_SHIFT);
|
|
|
|
reg |= ((enable & 0x1) << DSIM_FORCE_STOP_STATE_SHIFT);
|
|
|
|
writel(reg, &mipi_dsim->escmode);
|
|
}
|
|
|
|
unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = readl(&mipi_dsim->status);
|
|
|
|
/**
|
|
* check clock and data lane states.
|
|
* if MIPI-DSI controller was enabled at bootloader then
|
|
* TX_READY_HS_CLK is enabled otherwise STOP_STATE_CLK.
|
|
* so it should be checked for two case.
|
|
*/
|
|
if ((reg & DSIM_STOP_STATE_DAT(0xf)) &&
|
|
((reg & DSIM_STOP_STATE_CLK) ||
|
|
(reg & DSIM_TX_READY_HS_CLK)))
|
|
return 1;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim,
|
|
unsigned int cnt_val)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (readl(&mipi_dsim->escmode)) &
|
|
~(0x7ff << DSIM_STOP_STATE_CNT_SHIFT);
|
|
|
|
reg |= ((cnt_val & 0x7ff) << DSIM_STOP_STATE_CNT_SHIFT);
|
|
|
|
writel(reg, &mipi_dsim->escmode);
|
|
}
|
|
|
|
void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim,
|
|
unsigned int timeout)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (readl(&mipi_dsim->timeout)) &
|
|
~(0xff << DSIM_BTA_TOUT_SHIFT);
|
|
|
|
reg |= (timeout << DSIM_BTA_TOUT_SHIFT);
|
|
|
|
writel(reg, &mipi_dsim->timeout);
|
|
}
|
|
|
|
void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim,
|
|
unsigned int timeout)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (readl(&mipi_dsim->timeout)) &
|
|
~(0xffff << DSIM_LPDR_TOUT_SHIFT);
|
|
|
|
reg |= (timeout << DSIM_LPDR_TOUT_SHIFT);
|
|
|
|
writel(reg, &mipi_dsim->timeout);
|
|
}
|
|
|
|
void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim,
|
|
unsigned int lp)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = readl(&mipi_dsim->escmode);
|
|
|
|
reg &= ~DSIM_CMD_LPDT_LP;
|
|
|
|
if (lp)
|
|
reg |= DSIM_CMD_LPDT_LP;
|
|
|
|
writel(reg, &mipi_dsim->escmode);
|
|
}
|
|
|
|
void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim,
|
|
unsigned int lp)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = readl(&mipi_dsim->escmode);
|
|
|
|
reg &= ~DSIM_TX_LPDT_LP;
|
|
|
|
if (lp)
|
|
reg |= DSIM_TX_LPDT_LP;
|
|
|
|
writel(reg, &mipi_dsim->escmode);
|
|
}
|
|
|
|
void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim,
|
|
unsigned int enable)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
|
|
~(1 << DSIM_TX_REQUEST_HSCLK_SHIFT);
|
|
|
|
reg |= enable << DSIM_TX_REQUEST_HSCLK_SHIFT;
|
|
|
|
writel(reg, &mipi_dsim->clkctrl);
|
|
}
|
|
|
|
void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim,
|
|
unsigned int swap_en)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = readl(&mipi_dsim->phyacchr1);
|
|
|
|
reg &= ~(0x3 << DSIM_DPDN_SWAP_DATA_SHIFT);
|
|
reg |= (swap_en & 0x3) << DSIM_DPDN_SWAP_DATA_SHIFT;
|
|
|
|
writel(reg, &mipi_dsim->phyacchr1);
|
|
}
|
|
|
|
void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim,
|
|
unsigned int hs_zero)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
|
|
~(0xf << DSIM_ZEROCTRL_SHIFT);
|
|
|
|
reg |= ((hs_zero & 0xf) << DSIM_ZEROCTRL_SHIFT);
|
|
|
|
writel(reg, &mipi_dsim->pllctrl);
|
|
}
|
|
|
|
void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
|
|
~(0x7 << DSIM_PRECTRL_SHIFT);
|
|
|
|
reg |= ((prep & 0x7) << DSIM_PRECTRL_SHIFT);
|
|
|
|
writel(reg, &mipi_dsim->pllctrl);
|
|
}
|
|
|
|
void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = readl(&mipi_dsim->intsrc);
|
|
|
|
reg |= INTSRC_PLL_STABLE;
|
|
|
|
writel(reg, &mipi_dsim->intsrc);
|
|
}
|
|
|
|
void exynos_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
|
|
writel(0xffffffff, &mipi_dsim->intsrc);
|
|
}
|
|
|
|
unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim)
|
|
{
|
|
unsigned int reg;
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
|
|
reg = readl(&mipi_dsim->status);
|
|
|
|
return reg & DSIM_PLL_STABLE ? 1 : 0;
|
|
}
|
|
|
|
unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
|
|
return readl(&mipi_dsim->fifoctrl) & ~(0x1f);
|
|
}
|
|
|
|
void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device *dsim,
|
|
unsigned int di, unsigned int data0, unsigned int data1)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = (DSIM_PKTHDR_DAT1(data1) | DSIM_PKTHDR_DAT0(data0) |
|
|
DSIM_PKTHDR_DI(di));
|
|
|
|
writel(reg, &mipi_dsim->pkthdr);
|
|
}
|
|
|
|
unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device
|
|
*dsim)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = readl(&mipi_dsim->intsrc);
|
|
|
|
return (reg & INTSRC_FRAME_DONE) ? 1 : 0;
|
|
}
|
|
|
|
void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
unsigned int reg = readl(&mipi_dsim->intsrc);
|
|
|
|
writel(reg | INTSRC_FRAME_DONE, &mipi_dsim->intsrc);
|
|
}
|
|
|
|
void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim,
|
|
unsigned int tx_data)
|
|
{
|
|
struct exynos_mipi_dsim *mipi_dsim =
|
|
(struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
|
|
|
|
writel(tx_data, &mipi_dsim->payload);
|
|
}
|
|
|