upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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73 lines
1.5 KiB
73 lines
1.5 KiB
/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/sysmap.h>
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#include <asm/kona-common/clk.h>
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#include "clk-core.h"
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/* Enable appropriate clocks for an SDIO port */
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int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
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{
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int ret;
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struct clk *c;
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char *clkstr;
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char *slpstr;
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char *ahbstr;
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switch ((u32) base) {
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case CONFIG_SYS_SDIO_BASE0:
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clkstr = CONFIG_SYS_SDIO0 "_clk";
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ahbstr = CONFIG_SYS_SDIO0 "_ahb_clk";
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slpstr = CONFIG_SYS_SDIO0 "_sleep_clk";
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break;
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case CONFIG_SYS_SDIO_BASE1:
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clkstr = CONFIG_SYS_SDIO1 "_clk";
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ahbstr = CONFIG_SYS_SDIO1 "_ahb_clk";
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slpstr = CONFIG_SYS_SDIO1 "_sleep_clk";
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break;
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case CONFIG_SYS_SDIO_BASE2:
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clkstr = CONFIG_SYS_SDIO2 "_clk";
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ahbstr = CONFIG_SYS_SDIO2 "_ahb_clk";
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slpstr = CONFIG_SYS_SDIO2 "_sleep_clk";
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break;
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case CONFIG_SYS_SDIO_BASE3:
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clkstr = CONFIG_SYS_SDIO3 "_clk";
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ahbstr = CONFIG_SYS_SDIO3 "_ahb_clk";
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slpstr = CONFIG_SYS_SDIO3 "_sleep_clk";
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break;
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default:
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printf("%s: base 0x%p not found\n", __func__, base);
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return -EINVAL;
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}
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ret = clk_get_and_enable(ahbstr);
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if (ret)
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return ret;
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ret = clk_get_and_enable(slpstr);
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if (ret)
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return ret;
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c = clk_get(clkstr);
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if (c) {
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ret = clk_set_rate(c, rate);
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if (ret)
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return ret;
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ret = clk_enable(c);
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if (ret)
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return ret;
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} else {
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printf("%s: Couldn't find %s\n", __func__, clkstr);
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return -EINVAL;
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}
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*actual_ratep = rate;
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return 0;
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}
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