upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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77 lines
1.7 KiB
77 lines
1.7 KiB
/*
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* Copyright (C) 2007 Sascha Hauer, Pengutronix
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* Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
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* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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#if defined(CONFIG_SYS_NAND_LARGEPAGE)
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struct system_control_regs *sc_regs =
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(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
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#endif
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gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE;
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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#ifdef CONFIG_MXC_UART
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mx27_uart1_init_pins();
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#endif
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#ifdef CONFIG_FEC_MXC
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mx27_fec_init_pins();
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imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
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gpio_set_value(GPIO_PORTC | 31, 1);
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#endif
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#ifdef CONFIG_MXC_MMC
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#if defined(CONFIG_MAGNESIUM)
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mx27_sd1_init_pins();
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#else
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mx27_sd2_init_pins();
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#endif
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#endif
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#if defined(CONFIG_SYS_NAND_LARGEPAGE)
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/*
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* set in FMCR NF_FMS Bit(5) to 1
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* (NAND Flash with 2 Kbyte page size)
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*/
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writel(readl(&sc_regs->fmcr) | (1 << 5), &sc_regs->fmcr);
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#endif
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return 0;
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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PHYS_SDRAM_1_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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PHYS_SDRAM_1_SIZE);
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#if CONFIG_NR_DRAM_BANKS > 1
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
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PHYS_SDRAM_2_SIZE);
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#endif
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}
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int checkboard(void)
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{
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puts("Board: ");
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puts(CONFIG_BOARDNAME);
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return 0;
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}
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