upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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117 lines
1.8 KiB
117 lines
1.8 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2014 Angelo Dureghello <angelo@sysam.it>
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*
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*/
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#ifndef __IMMAP_5307__
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#define __IMMAP_5307__
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#define MMAP_SIM (CONFIG_SYS_MBAR + 0x00000000)
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#define MMAP_INTC (CONFIG_SYS_MBAR + 0x00000040)
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#define MMAP_CSM (CONFIG_SYS_MBAR + 0x00000080)
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#define MMAP_DRAMC (CONFIG_SYS_MBAR + 0x00000100)
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#define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000140)
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#define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000180)
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#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x000001C0)
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#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000200)
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#define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00000244)
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typedef struct sim {
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u8 rsr;
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u8 sypcr;
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u8 swivr;
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u8 swsr;
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u16 par;
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u8 irqpar;
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u8 res1;
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u8 pllcr;
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u8 res2;
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u16 res3;
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u8 mpark;
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u8 res4;
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u16 res5;
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u32 res6;
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} sim_t;
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typedef struct intctrl {
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u32 ipr;
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u32 imr;
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u16 res7;
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u8 res8;
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u8 avr;
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u8 icr0;
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u8 icr1;
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u8 icr2;
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u8 icr3;
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u8 icr4;
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u8 icr5;
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u8 icr6;
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u8 icr7;
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u8 icr8;
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u8 icr9;
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u16 res9;
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} intctrl_t;
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typedef struct csm {
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u16 csar0; /* Chip-select Address */
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u16 res1;
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u32 csmr0; /* Chip-select Mask */
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u16 res2;
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u16 cscr0; /* Chip-select Control */
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u16 csar1;
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u16 res3;
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u32 csmr1;
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u16 res4;
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u16 cscr1;
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u16 csar2;
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u16 res5;
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u32 csmr2;
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u16 res6;
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u16 cscr2;
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u16 csar3;
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u16 res7;
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u32 csmr3;
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u16 res8;
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u16 cscr3;
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u16 csar4;
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u16 res9;
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u32 csmr4;
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u16 res10;
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u16 cscr4;
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u16 csar5;
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u16 res11;
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u32 csmr5;
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u16 res12;
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u16 cscr5;
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u16 csar6;
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u16 res13;
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u32 csmr6;
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u16 res14;
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u16 cscr6;
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u16 csar7;
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u16 res15;
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u32 csmr7;
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u16 res16;
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u16 cscr7;
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} csm_t;
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typedef struct sdramctrl {
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u16 dcr;
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u16 res1;
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u32 res2;
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u32 dacr0;
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u32 dmr0;
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u32 dacr1;
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u32 dmr1;
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} sdramctrl_t;
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typedef struct gpio {
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u16 paddr;
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u16 res1;
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u16 padat;
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u16 res2;
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} gpio_t;
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#endif /* __IMMAP_5307__ */
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