upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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62 lines
1.5 KiB
62 lines
1.5 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2012-2016 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <asm/fsl_pamu.h>
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DECLARE_GLOBAL_DATA_PTR;
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void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries)
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{
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int i = 0;
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int j;
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tbl->start_addr[i] =
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(uint64_t)virt_to_phys((void *)CONFIG_SYS_SDRAM_BASE);
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tbl->size[i] = (phys_size_t)(min(gd->ram_size, CONFIG_MAX_MEM_MAPPED));
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tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1;
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i++;
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#ifdef CONFIG_SYS_FLASH_BASE_PHYS
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tbl->start_addr[i] =
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(uint64_t)virt_to_phys((void *)CONFIG_SYS_FLASH_BASE_PHYS);
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tbl->size[i] = 256 * 1024 * 1024; /* 256MB flash */
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tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1;
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i++;
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#endif
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#if (defined(CONFIG_SPL_BUILD) && (CONFIG_SYS_INIT_L3_VADDR))
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tbl->start_addr[i] =
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(uint64_t)virt_to_phys((void *)CONFIG_SYS_INIT_L3_VADDR);
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tbl->size[i] = 256 * 1024; /* 256K CPC flash */
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tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1;
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i++;
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#endif
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debug("PAMU address\t\t\tsize\n");
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for (j = 0; j < i ; j++)
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debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]);
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*num_entries = i;
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}
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int sec_config_pamu_table(uint32_t liodn_ns, uint32_t liodn_s)
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{
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struct pamu_addr_tbl tbl;
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int num_entries = 0;
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int ret = 0;
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construct_pamu_addr_table(&tbl, &num_entries);
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ret = config_pamu(&tbl, num_entries, liodn_ns);
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if (ret)
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return ret;
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ret = config_pamu(&tbl, num_entries, liodn_s);
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if (ret)
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return ret;
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return ret;
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}
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