upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
449 lines
11 KiB
449 lines
11 KiB
/*
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* (C) Copyright 2008
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* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
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*
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* Copyright 2004 Freescale Semiconductor.
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* (C) Copyright 2002,2003, Motorola Inc.
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* Xianghua Xiao, (X.Xiao@motorola.com)
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*
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* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/immap_85xx.h>
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#include <ioports.h>
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#include <flash.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <asm/io.h>
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#include <i2c.h>
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#include <mb862xx.h>
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#include <video_fb.h>
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#include "upm_table.h"
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DECLARE_GLOBAL_DATA_PTR;
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extern flash_info_t flash_info[]; /* FLASH chips info */
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extern GraphicDevice mb862xx;
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void local_bus_init (void);
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ulong flash_get_size (ulong base, int banknum);
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int checkboard (void)
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{
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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char buf[64];
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int f;
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int i = getenv_f("serial#", buf, sizeof(buf));
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#ifdef CONFIG_PCI
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char *src;
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#endif
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puts("Board: Socrates");
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if (i > 0) {
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puts(", serial# ");
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puts(buf);
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}
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putc('\n');
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#ifdef CONFIG_PCI
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/* Check the PCI_clk sel bit */
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if (in_be32(&gur->porpllsr) & (1<<15)) {
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src = "SYSCLK";
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f = CONFIG_SYS_CLK_FREQ;
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} else {
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src = "PCI_CLK";
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f = CONFIG_PCI_CLK_FREQ;
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}
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printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src);
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#else
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printf ("PCI1: disabled\n");
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#endif
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/*
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* Initialize local bus.
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*/
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local_bus_init ();
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return 0;
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}
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int misc_init_r (void)
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{
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/*
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* Adjust flash start and offset to detected values
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*/
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gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
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gd->bd->bi_flashoffset = 0;
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/*
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* Check if boot FLASH isn't max size
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*/
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if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) {
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set_lbc_or(0, gd->bd->bi_flashstart |
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(CONFIG_SYS_OR0_PRELIM & 0x00007fff));
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set_lbc_br(0, gd->bd->bi_flashstart |
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(CONFIG_SYS_BR0_PRELIM & 0x00007fff));
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/*
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* Re-check to get correct base address
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*/
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flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1);
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}
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/*
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* Check if only one FLASH bank is available
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*/
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if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) {
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set_lbc_or(1, 0);
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set_lbc_br(1, 0);
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/*
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* Re-do flash protection upon new addresses
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*/
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flash_protect (FLAG_PROTECT_CLEAR,
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gd->bd->bi_flashstart, 0xffffffff,
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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/* Monitor protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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/* Environment protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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/* Redundant environment protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR_REDUND,
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CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
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&flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
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}
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return 0;
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}
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/*
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* Initialize Local Bus
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*/
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void local_bus_init (void)
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{
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volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
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volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
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sys_info_t sysinfo;
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uint clkdiv;
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uint lbc_mhz;
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uint lcrr = CONFIG_SYS_LBC_LCRR;
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get_sys_info (&sysinfo);
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clkdiv = lbc->lcrr & LCRR_CLKDIV;
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lbc_mhz = sysinfo.freqSystemBus / 1000000 / clkdiv;
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/* Disable PLL bypass for Local Bus Clock >= 66 MHz */
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if (lbc_mhz >= 66)
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lcrr &= ~LCRR_DBYP; /* DLL Enabled */
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else
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lcrr |= LCRR_DBYP; /* DLL Bypass */
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out_be32 (&lbc->lcrr, lcrr);
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asm ("sync;isync;msync");
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out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */
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out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */
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out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */
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out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */
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/* Init UPMA for FPGA access */
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out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */
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upmconfig (UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int));
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/* Init UPMB for Lime controller access */
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out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */
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upmconfig (UPMB, (uint *)UPMTableB, sizeof(UPMTableB)/sizeof(int));
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}
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#if defined(CONFIG_PCI)
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/*
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* Initialize PCI Devices, report devices found.
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*/
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#ifndef CONFIG_PCI_PNP
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static struct pci_config_table pci_mpc85xxads_config_table[] = {
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{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_IDSEL_NUMBER, PCI_ANY_ID,
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pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
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PCI_ENET0_MEMADDR,
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER}},
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{}
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};
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#endif
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static struct pci_controller hose = {
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#ifndef CONFIG_PCI_PNP
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config_table:pci_mpc85xxads_config_table,
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#endif
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};
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#endif /* CONFIG_PCI */
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void pci_init_board (void)
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{
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#ifdef CONFIG_PCI
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pci_mpc85xx_init (&hose);
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#endif /* CONFIG_PCI */
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_R
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int board_early_init_r (void)
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{
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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/* set and reset the GPIO pin 2 which will reset the W83782G chip */
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out_8((unsigned char*)&gur->gpoutdr, 0x3F );
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out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */
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udelay(200);
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out_8( (unsigned char*)&gur->gpoutdr, 0x1F );
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return (0);
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}
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#endif /* CONFIG_BOARD_EARLY_INIT_R */
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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void
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ft_board_setup(void *blob, bd_t *bd)
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{
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u32 val[12];
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int rc, i = 0;
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ft_cpu_setup(blob, bd);
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/* Fixup NOR FLASH mapping */
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val[i++] = 0; /* chip select number */
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val[i++] = 0; /* always 0 */
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val[i++] = gd->bd->bi_flashstart;
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val[i++] = gd->bd->bi_flashsize;
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if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) {
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/* Fixup LIME mapping */
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val[i++] = 2; /* chip select number */
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val[i++] = 0; /* always 0 */
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val[i++] = CONFIG_SYS_LIME_BASE;
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val[i++] = CONFIG_SYS_LIME_SIZE;
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}
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/* Fixup FPGA mapping */
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val[i++] = 3; /* chip select number */
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val[i++] = 0; /* always 0 */
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val[i++] = CONFIG_SYS_FPGA_BASE;
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val[i++] = CONFIG_SYS_FPGA_SIZE;
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rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
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val, i * sizeof(u32), 1);
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if (rc)
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printf("Unable to update localbus ranges, err=%s\n",
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fdt_strerror(rc));
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}
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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#define DEFAULT_BRIGHTNESS 25
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#define BACKLIGHT_ENABLE (1 << 31)
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static const gdc_regs init_regs [] =
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{
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{0x0100, 0x00010f00},
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{0x0020, 0x801901df},
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{0x0024, 0x00000000},
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{0x0028, 0x00000000},
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{0x002c, 0x00000000},
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{0x0110, 0x00000000},
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{0x0114, 0x00000000},
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{0x0118, 0x01df0320},
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{0x0004, 0x041f0000},
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{0x0008, 0x031f031f},
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{0x000c, 0x017f0349},
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{0x0010, 0x020c0000},
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{0x0014, 0x01df01e9},
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{0x0018, 0x00000000},
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{0x001c, 0x01e00320},
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{0x0100, 0x80010f00},
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{0x0, 0x0}
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};
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const gdc_regs *board_get_regs (void)
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{
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return init_regs;
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}
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int lime_probe(void)
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{
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uint cfg_br2;
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uint cfg_or2;
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int type;
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cfg_br2 = get_lbc_br(2);
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cfg_or2 = get_lbc_or(2);
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/* Configure GPCM for CS2 */
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set_lbc_br(2, 0);
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set_lbc_or(2, 0xfc000410);
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set_lbc_br(2, (CONFIG_SYS_LIME_BASE) | 0x00001901);
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/* Get controller type */
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type = mb862xx_probe(CONFIG_SYS_LIME_BASE);
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/* Restore previous CS2 configuration */
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set_lbc_br(2, 0);
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set_lbc_or(2, cfg_or2);
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set_lbc_br(2, cfg_br2);
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return (type == MB862XX_TYPE_LIME) ? 1 : 0;
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}
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/* Returns Lime base address */
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unsigned int board_video_init (void)
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{
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if (!lime_probe())
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return 0;
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mb862xx.winSizeX = 800;
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mb862xx.winSizeY = 480;
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mb862xx.gdfIndex = GDF_15BIT_555RGB;
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mb862xx.gdfBytesPP = 2;
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return CONFIG_SYS_LIME_BASE;
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}
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#define W83782D_REG_CFG 0x40
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#define W83782D_REG_BANK_SEL 0x4e
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#define W83782D_REG_ADCCLK 0x4b
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#define W83782D_REG_BEEP_CTRL 0x4d
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#define W83782D_REG_BEEP_CTRL2 0x57
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#define W83782D_REG_PWMOUT1 0x5b
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#define W83782D_REG_VBAT 0x5d
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static int w83782d_hwmon_init(void)
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{
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u8 buf;
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if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 1, &buf, 1))
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return -1;
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 0x80);
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BANK_SEL, 0);
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_ADCCLK, 0x40);
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buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL);
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL,
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buf | 0x80);
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL2, 0);
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_PWMOUT1, 0x47);
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_VBAT, 0x01);
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buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG);
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i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG,
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(buf & 0xf4) | 0x01);
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return 0;
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}
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static void board_backlight_brightness(int br)
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{
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u32 reg;
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u8 buf;
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u8 old_buf;
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/* Select bank 0 */
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if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &old_buf, 1))
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goto err;
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else
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buf = old_buf & 0xf8;
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if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &buf, 1))
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goto err;
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if (br > 0) {
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/* PWMOUT1 duty cycle ctrl */
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buf = 255 / (100 / br);
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if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x5b, 1, &buf, 1))
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goto err;
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/* LEDs on */
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reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c));
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if (!(reg & BACKLIGHT_ENABLE));
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out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c),
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reg | BACKLIGHT_ENABLE);
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} else {
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buf = 0;
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if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x5b, 1, &buf, 1))
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goto err;
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/* LEDs off */
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reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c));
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reg &= ~BACKLIGHT_ENABLE;
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out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c), reg);
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}
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/* Restore previous bank setting */
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if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &old_buf, 1))
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goto err;
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return;
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err:
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printf("W83782G I2C access failed\n");
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}
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void board_backlight_switch (int flag)
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{
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char * param;
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int rc;
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if (w83782d_hwmon_init())
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printf ("hwmon IC init failed\n");
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if (flag) {
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param = getenv("brightness");
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rc = param ? simple_strtol(param, NULL, 10) : -1;
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if (rc < 0)
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rc = DEFAULT_BRIGHTNESS;
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} else {
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rc = 0;
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}
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board_backlight_brightness(rc);
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}
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#if defined(CONFIG_CONSOLE_EXTRA_INFO)
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/*
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* Return text to be printed besides the logo.
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*/
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void video_get_info_str (int line_number, char *info)
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{
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if (line_number == 1) {
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strcpy (info, " Board: Socrates");
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} else {
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info [0] = '\0';
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}
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}
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#endif
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