upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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156 lines
3.3 KiB
156 lines
3.3 KiB
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2016 Google, Inc
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <spl.h>
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#include <asm/cpu.h>
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#include <asm/mtrr.h>
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#include <asm/processor.h>
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#include <asm-generic/sections.h>
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DECLARE_GLOBAL_DATA_PTR;
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__weak int arch_cpu_init_dm(void)
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{
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return 0;
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}
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static int x86_spl_init(void)
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{
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/*
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* TODO(sjg@chromium.org): We use this area of RAM for the stack
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* and global_data in SPL. Once U-Boot starts up and releocates it
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* is not needed. We could make this a CONFIG option or perhaps
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* place it immediately below CONFIG_SYS_TEXT_BASE.
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*/
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char *ptr = (char *)0x110000;
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int ret;
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debug("%s starting\n", __func__);
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ret = spl_init();
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if (ret) {
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debug("%s: spl_init() failed\n", __func__);
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return ret;
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}
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ret = arch_cpu_init();
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if (ret) {
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debug("%s: arch_cpu_init() failed\n", __func__);
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return ret;
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}
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ret = arch_cpu_init_dm();
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if (ret) {
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debug("%s: arch_cpu_init_dm() failed\n", __func__);
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return ret;
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}
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preloader_console_init();
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ret = print_cpuinfo();
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if (ret) {
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debug("%s: print_cpuinfo() failed\n", __func__);
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return ret;
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}
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ret = dram_init();
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if (ret) {
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debug("%s: dram_init() failed\n", __func__);
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return ret;
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}
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memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
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/* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */
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ret = interrupt_init();
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if (ret) {
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debug("%s: interrupt_init() failed\n", __func__);
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return ret;
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}
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/*
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* The stack grows down from ptr. Put the global data at ptr. This
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* will only be used for SPL. Once SPL loads U-Boot proper it will
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* set up its own stack.
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*/
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gd->new_gd = (struct global_data *)ptr;
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memcpy(gd->new_gd, gd, sizeof(*gd));
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arch_setup_gd(gd->new_gd);
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gd->start_addr_sp = (ulong)ptr;
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/* Cache the SPI flash. Otherwise copying the code to RAM takes ages */
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ret = mtrr_add_request(MTRR_TYPE_WRBACK,
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(1ULL << 32) - CONFIG_XIP_ROM_SIZE,
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CONFIG_XIP_ROM_SIZE);
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if (ret) {
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debug("%s: SPI cache setup failed\n", __func__);
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return ret;
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}
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return 0;
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}
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void board_init_f(ulong flags)
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{
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int ret;
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ret = x86_spl_init();
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if (ret) {
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debug("Error %d\n", ret);
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hang();
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}
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/* Uninit CAR and jump to board_init_f_r() */
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board_init_f_r_trampoline(gd->start_addr_sp);
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}
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void board_init_f_r(void)
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{
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init_cache_f_r();
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gd->flags &= ~GD_FLG_SERIAL_READY;
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debug("cache status %d\n", dcache_status());
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board_init_r(gd, 0);
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOARD;
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}
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int spl_start_uboot(void)
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{
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return 0;
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}
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void spl_board_announce_boot_device(void)
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{
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printf("SPI flash");
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}
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static int spl_board_load_image(struct spl_image_info *spl_image,
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struct spl_boot_device *bootdev)
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{
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spl_image->size = CONFIG_SYS_MONITOR_LEN;
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spl_image->entry_point = CONFIG_SYS_TEXT_BASE;
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spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
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spl_image->os = IH_OS_U_BOOT;
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spl_image->name = "U-Boot";
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debug("Loading to %lx\n", spl_image->load_addr);
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return 0;
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}
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SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image);
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int spl_spi_load_image(void)
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{
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return -EPERM;
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}
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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int ret;
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printf("Jumping to 64-bit U-Boot: Note many features are missing\n");
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ret = cpu_jump_to_64bit_uboot(spl_image->entry_point);
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debug("ret=%d\n", ret);
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while (1)
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;
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}
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