upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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179 lines
6.0 KiB
179 lines
6.0 KiB
/*
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* (C) Copyright 2004
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* IMMS, gGmbH <www.imms.de>
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* Thomas Elste <info@elste.org>
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*
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* Configuation settings for ModNET50 board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* If we are developing, we might want to start u-boot from ram
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* so we MUST NOT initialize critical regs like mem-timing ...
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*/
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#define CONFIG_INIT_CRITICAL /* undef for developing */
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
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#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
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#define CONFIG_NETARM /* it's a Netsiclicon NET+ARM */
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#undef CONFIG_NETARM_NET40_REV2 /* it's a Net+40 Rev. 2 */
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#undef CONFIG_NETARM_NET40_REV4 /* it's a Net+40 Rev. 4 */
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#define CONFIG_NETARM_NET50 /* it's a Net+50 */
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#define CONFIG_MODNET50 1 /* on an ModNET50 Board */
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#undef CONFIG_USE_IRQ /* don't need them anymore */
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/*
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* Size of malloc() pool
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*/
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
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#define CFG_GBL_DATA_SIZE 128
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/*
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* Hardware drivers
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*/
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#define CONFIG_DRIVER_NETARMETH 1
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/*
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* select serial console configuration
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*/
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#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
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#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_JFFS2))
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 192.168.30.2
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#define CONFIG_SERVERIP 192.168.30.122
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#define CFG_ETH_PHY_ADDR 0x100
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#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
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/*#define CONFIG_BOOTDELAY 10*/
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/* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */
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#define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
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#define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K root=/dev/ram keepinitrd"
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "modnet50 # " /* Monitor Command Prompt */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
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#define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
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#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
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#define CFG_LOAD_ADDR 0x00500000 /* default load address */
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#define CFG_HZ 900 /* decrementer freq: 2 kHz */
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/* valid baudrates */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
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#define PHYS_SDRAM_2 0x01000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
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#define PHYS_FLASH_1 0x10000000 /* Flash Bank #1 */
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#define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip only, 16bit access) */
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#define PHYS_FLASH_2 0x10200001
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#define PHYS_FLASH_2_SIZE 0x00200000
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#define CONFIG_NETARM_EEPROM
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/* #ifdef CONFIG_NETARM_EEPROM */
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#define PHYS_NVRAM_1 0x20000000 /* EEPROM Bank #1 */
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#define PHYS_NVRAM_SIZE 0x00002000 /* 8 KB */
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/* #endif */
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#define PHYS_EXT_1 0x30000000 /* Extensions Bank #1 */
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#define PHYS_EXT_SIZE 0x01000000 /* 32 MB memory mapped I/O */
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#define CFG_FLASH_BASE PHYS_FLASH_1
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#define CFG_FLASH_SIZE PHYS_FLASH_1_SIZE
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
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#define CFG_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */
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/* timeout values are in ticks */
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#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
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#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
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/* environment settings */
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#define CFG_ENV_IS_IN_FLASH
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#undef CFG_ENV_IS_NOWHERE
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#define CFG_ENV_ADDR 0x1001C000 /* environment start address */
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#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
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#define CFG_ENV_SIZE 0x4000 /* max size for environment */
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/* Flash banks JFFS2 should use */
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#define CFG_JFFS2_FIRST_BANK 0
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#define CFG_JFFS2_FIRST_SECTOR 8
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#define CFG_JFFS2_NUM_BANKS 2
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#endif /* __CONFIG_H */
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