upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.6 KiB
53 lines
1.6 KiB
Texas Instruments TI SCI Clock Controller
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=========================================
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All clocks on Texas Instruments' SoCs that contain a System Controller,
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are only controlled by this entity. Communication between a host processor
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running an OS and the System Controller happens through a protocol known
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as TI SCI[1]. This clock implementation plugs into the common clock
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framework and makes use of the TI SCI protocol on clock API requests.
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[1] http://processors.wiki.ti.com/index.php/TISCI
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Clock Controller Node
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=====================
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The clock controller node represents the clocks managed by the SYSFW. Because
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this relies on the TI SCI protocol to communicate with the SYSFW it must be a
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child of the sysfw node.
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Required Properties:
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--------------------
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- compatible: Must be "ti,k2g-sci-clk"
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- #clock-cells: Must be be 2. In clock consumers, this cell represents the
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device ID and clock ID exposed by the SYSFW firmware.
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Example (AM65x):
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----------------
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dmsc: dmsc {
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compatible = "ti,k2g-sci";
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...
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k3_clks: clocks {
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compatible = "ti,k2g-sci-clk";
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#clock-cells = <2>;
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};
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};
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Clock Consumers
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===============
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Hardware blocks supplied by a clock should contain a "clocks" property that is
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a phandle pointing to the clock controller node along with an index representing
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the device id together with a clock ID to be passed to the SYSFW for device
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control.
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Required Properties:
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--------------------
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- clocks: phandle pointing to the corresponding clock node, an ID representing
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the device, and an index representing a clock.
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Example (AM65x):
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----------------
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uart2: serial@02800000 {
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compatible = "ti,omap4-uart";
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...
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clocks = <&k3_clks 0x0007 1>;
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};
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