upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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611 lines
15 KiB
611 lines
15 KiB
/********************************************************************
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*
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* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
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*
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* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/flash.c,v $
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* $Revision: 1.3 $
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* $Author: mleeman $
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* $Date: 2005/02/21 12:48:58 $
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*
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* Last ChangeLog Entry
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* $Log: flash.c,v $
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* Revision 1.3 2005/02/21 12:48:58 mleeman
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* update of copyright years (feedback wd)
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*
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* Revision 1.2 2005/02/21 11:04:04 mleeman
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* remove dead code and Coding style (feedback wd)
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*
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* Revision 1.1 2005/02/14 09:23:46 mleeman
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* - moved 'barcohydra' directory to a more generic barco; since we will be
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* supporting and adding multiple boards
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*
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* Revision 1.2 2005/02/09 12:56:23 mleeman
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* add generic header to track changes in sources
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*
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*
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*******************************************************************/
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/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc824x.h>
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#include <asm/processor.h>
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#include <flash.h>
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#define ROM_CS0_START 0xFF800000
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#define ROM_CS1_START 0xFF000000
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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#if defined(CONFIG_ENV_IS_IN_FLASH)
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# ifndef CONFIG_ENV_ADDR
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# define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
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# endif
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# ifndef CONFIG_ENV_SIZE
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# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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# endif
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# ifndef CONFIG_ENV_SECT_SIZE
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# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
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# endif
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#endif
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static int write_word (flash_info_t *info, ulong dest, ulong data);
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/*flash command address offsets*/
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#define ADDR0 (0xAAA)
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#define ADDR1 (0x555)
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#define ADDR3 (0x001)
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#define FLASH_WORD_SIZE unsigned char
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/*-----------------------------------------------------------------------
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*/
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static unsigned long flash_id(unsigned char mfct, unsigned char chip) __attribute__ ((const));
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typedef struct{
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FLASH_WORD_SIZE extval;
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unsigned short intval;
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} map_entry;
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static unsigned long flash_id(unsigned char mfct, unsigned char chip)
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{
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static const map_entry mfct_map[] = {
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{(FLASH_WORD_SIZE) AMD_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
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{(FLASH_WORD_SIZE) FUJ_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
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{(FLASH_WORD_SIZE) STM_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
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{(FLASH_WORD_SIZE) MT_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
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{(FLASH_WORD_SIZE) INTEL_MANUFACT,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
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{(FLASH_WORD_SIZE) INTEL_ALT_MANU,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
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};
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static const map_entry chip_map[] = {
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{AMD_ID_F040B, FLASH_AM040},
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{AMD_ID_F033C, FLASH_AM033},
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{AMD_ID_F065D, FLASH_AM065},
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{ATM_ID_LV040, FLASH_AT040},
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{(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
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};
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const map_entry *p;
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unsigned long result = FLASH_UNKNOWN;
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/* find chip id */
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for(p = &chip_map[0]; p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++){
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if(p->extval == chip){
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result = FLASH_VENDMASK | p->intval;
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break;
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}
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}
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/* find vendor id */
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for(p = &mfct_map[0]; p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++){
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if(p->extval == mfct){
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result &= ~FLASH_VENDMASK;
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result |= (unsigned long) p->intval << 16;
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break;
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}
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}
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return result;
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}
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unsigned long flash_init(void)
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{
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unsigned long i;
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unsigned char j;
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static const ulong flash_banks[] = CFG_FLASH_BANKS;
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/* Init: no FLASHes known */
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for (i = 0; i < CFG_MAX_FLASH_BANKS; i++){
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flash_info_t * const pflinfo = &flash_info[i];
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pflinfo->flash_id = FLASH_UNKNOWN;
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pflinfo->size = 0;
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pflinfo->sector_count = 0;
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}
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/* Enable writes to Hydra/Argus flash */
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{
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register unsigned int temp;
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CONFIG_READ_WORD(PICR1,temp);
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temp |= PICR1_FLASH_WR_EN;
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CONFIG_WRITE_WORD(PICR1,temp);
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}
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for(i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++){
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flash_info_t * const pflinfo = &flash_info[i];
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const unsigned long base_address = flash_banks[i];
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volatile FLASH_WORD_SIZE * const flash = (FLASH_WORD_SIZE *) base_address;
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/* write autoselect sequence */
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flash[0x5555] = 0xaa;
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flash[0x2aaa] = 0x55;
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flash[0x5555] = 0x90;
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__asm__ __volatile__("sync");
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pflinfo->flash_id = flash_id(flash[0x0], flash[0x1]);
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switch(pflinfo->flash_id & FLASH_TYPEMASK){
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case FLASH_AM033:
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pflinfo->size = 0x00200000;
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pflinfo->sector_count = 64;
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for(j = 0; j < 64; j++){
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pflinfo->start[j] = base_address + 0x00010000 * j;
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pflinfo->protect[j] = flash[(j << 16) | 0x2];
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}
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break;
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case FLASH_AM065:
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pflinfo->size = 0x00800000;
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pflinfo->sector_count =128;
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for(j = 0; j < 128; j++){
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pflinfo->start[j] = base_address + 0x00010000 * j;
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pflinfo->protect[j] = flash[(j << 16) | 0x2];
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}
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break;
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case FLASH_AT040:
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pflinfo->size = 0x00080000;
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pflinfo->sector_count = 2;
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pflinfo->start[0] = base_address ;
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pflinfo->start[1] = base_address + 0x00004000;
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pflinfo->protect[0] = ((flash[0x02] & 0X01)==0) ? 0X02 : 0X01;
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pflinfo->protect[1] = 0X02;
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break;
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case FLASH_AM040:
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pflinfo->size = 0x00080000;
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pflinfo->sector_count = 8;
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for(j = 0; j < 8; j++){
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pflinfo->start[j] = base_address + 0x00010000 * j;
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pflinfo->protect[j] = flash[(j << 16) | 0x2];
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}
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break;
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case FLASH_STM800AB:
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pflinfo->size = 0x00100000;
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pflinfo->sector_count = 19;
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pflinfo->start[0] = base_address;
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pflinfo->start[1] = base_address + 0x4000;
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pflinfo->start[2] = base_address + 0x6000;
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pflinfo->start[3] = base_address + 0x8000;
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for(j = 1; j < 16; j++){
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pflinfo->start[j+3] = base_address + 0x00010000 * j;
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}
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break;
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}
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/* Protect monitor and environment sectors */
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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flash_protect(FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[0]);
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#endif
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#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
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&flash_info[0]);
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#endif
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/* reset device to read mode */
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flash[0x0000] = 0xf0;
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__asm__ __volatile__("sync");
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}
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return flash_info[0].size + flash_info[1].size;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info(flash_info_t *info)
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{
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static const char unk[] = "Unknown";
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const char *mfct = unk, *type = unk;
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unsigned int i;
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if(info->flash_id != FLASH_UNKNOWN){
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switch(info->flash_id & FLASH_VENDMASK){
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case FLASH_MAN_ATM:
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mfct = "Atmel";
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break;
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case FLASH_MAN_AMD:
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mfct = "AMD";
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break;
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case FLASH_MAN_FUJ:
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mfct = "FUJITSU";
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break;
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case FLASH_MAN_STM:
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mfct = "STM";
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break;
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case FLASH_MAN_SST:
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mfct = "SST";
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break;
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case FLASH_MAN_BM:
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mfct = "Bright Microelectonics";
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break;
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case FLASH_MAN_INTEL:
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mfct = "Intel";
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break;
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}
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switch(info->flash_id & FLASH_TYPEMASK){
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case FLASH_AT040:
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type = "AT49LV040 (512K * 8, uniform sector size)";
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break;
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case FLASH_AM033:
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type = "AM29F033C (4 Mbit * 8, uniform sector size)";
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break;
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case FLASH_AM040:
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type = "AM29F040B (512K * 8, uniform sector size)";
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break;
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case FLASH_AM065:
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type = "AM29F0465D ( 8 MBit * 8, uniform sector size) or part of AM29F652D( 16 MB)";
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break;
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case FLASH_AM400B:
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type = "AM29LV400B (4 Mbit, bottom boot sect)";
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break;
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case FLASH_AM400T:
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type = "AM29LV400T (4 Mbit, top boot sector)";
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break;
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case FLASH_AM800B:
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type = "AM29LV800B (8 Mbit, bottom boot sect)";
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break;
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case FLASH_AM800T:
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type = "AM29LV800T (8 Mbit, top boot sector)";
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break;
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case FLASH_AM160T:
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type = "AM29LV160T (16 Mbit, top boot sector)";
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break;
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case FLASH_AM320B:
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type = "AM29LV320B (32 Mbit, bottom boot sect)";
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break;
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case FLASH_AM320T:
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type = "AM29LV320T (32 Mbit, top boot sector)";
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break;
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case FLASH_STM800AB:
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type = "M29W800AB (8 Mbit, bottom boot sect)";
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break;
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case FLASH_SST800A:
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type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
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break;
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case FLASH_SST160A:
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type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
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break;
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}
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}
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printf(
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"\n Brand: %s Type: %s\n"
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" Size: %lu KB in %d Sectors\n",
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mfct,
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type,
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info->size >> 10,
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info->sector_count
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);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++){
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unsigned long size;
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unsigned int erased;
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unsigned long * flash = (unsigned long *) info->start[i];
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/*
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* Check if whole sector is erased
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*/
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size =
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(i != (info->sector_count - 1)) ?
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(info->start[i + 1] - info->start[i]) >> 2 :
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(info->start[0] + info->size - info->start[i]) >> 2;
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for(
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flash = (unsigned long *) info->start[i], erased = 1;
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(flash != (unsigned long *) info->start[i] + size) && erased;
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flash++
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){
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erased = *flash == ~0x0UL;
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}
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printf(
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"%s %08lX %s %s",
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(i % 5) ? "" : "\n ",
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info->start[i],
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erased ? "E" : " ",
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info->protect[i] ? "RO" : " "
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);
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}
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puts("\n");
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return;
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}
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int flash_erase(flash_info_t *info, int s_first, int s_last)
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{
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volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
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int flag, prot, sect, l_sect;
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ulong start, now, last;
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unsigned char sh8b;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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if ((info->flash_id == FLASH_UNKNOWN) ||
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(info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
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printf ("Can't erase unknown flash type - aborted\n");
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return 1;
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}
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prot = 0;
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for (sect=s_first; sect<=s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf ("\n");
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}
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l_sect = -1;
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/* Check the ROM CS */
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if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START)){
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sh8b = 3;
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}
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else{
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sh8b = 0;
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}
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
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addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
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addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
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addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
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addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect<=s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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addr = (FLASH_WORD_SIZE *)(info->start[0] + (
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(info->start[sect] - info->start[0]) << sh8b));
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if (info->flash_id & FLASH_MAN_SST){
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addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
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addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
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addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
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addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
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addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
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addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
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udelay(30000); /* wait 30 ms */
|
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}
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else
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addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
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l_sect = sect;
|
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}
|
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}
|
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|
|
/* re-enable interrupts if necessary */
|
|
if (flag){
|
|
enable_interrupts();
|
|
}
|
|
|
|
/* wait at least 80us - let's wait 1 ms */
|
|
udelay (1000);
|
|
|
|
/*
|
|
* We wait for the last triggered sector
|
|
*/
|
|
if (l_sect < 0){
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|
goto DONE;
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|
}
|
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|
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start = get_timer (0);
|
|
last = start;
|
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addr = (FLASH_WORD_SIZE *)(info->start[0] + (
|
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(info->start[l_sect] - info->start[0]) << sh8b));
|
|
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
|
|
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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return 1;
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}
|
|
/* show that we're waiting */
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|
if ((now - last) > 1000) { /* every second */
|
|
serial_putc ('.');
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last = now;
|
|
}
|
|
}
|
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|
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DONE:
|
|
/* reset to read mode */
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addr = (FLASH_WORD_SIZE *)info->start[0];
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|
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
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|
|
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printf (" done\n");
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|
return 0;
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|
}
|
|
|
|
/*-----------------------------------------------------------------------
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|
* Copy memory to flash, returns:
|
|
* 0 - OK
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|
* 1 - write timeout
|
|
* 2 - Flash not erased
|
|
*/
|
|
|
|
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
|
{
|
|
ulong cp, wp, data;
|
|
int i, l, rc;
|
|
|
|
wp = (addr & ~3); /* get lower word aligned address */
|
|
|
|
/*
|
|
* handle unaligned start bytes
|
|
*/
|
|
if ((l = addr - wp) != 0) {
|
|
data = 0;
|
|
for (i=0, cp=wp; i<l; ++i, ++cp) {
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
}
|
|
for (; i<4 && cnt>0; ++i) {
|
|
data = (data << 8) | *src++;
|
|
--cnt;
|
|
++cp;
|
|
}
|
|
for (; cnt==0 && i<4; ++i, ++cp) {
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
}
|
|
|
|
if ((rc = write_word(info, wp, data)) != 0) {
|
|
return (rc);
|
|
}
|
|
wp += 4;
|
|
}
|
|
|
|
/*
|
|
* handle word aligned part
|
|
*/
|
|
while (cnt >= 4) {
|
|
data = 0;
|
|
for (i=0; i<4; ++i) {
|
|
data = (data << 8) | *src++;
|
|
}
|
|
if ((rc = write_word(info, wp, data)) != 0) {
|
|
return (rc);
|
|
}
|
|
wp += 4;
|
|
cnt -= 4;
|
|
}
|
|
|
|
if (cnt == 0) {
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* handle unaligned tail bytes
|
|
*/
|
|
data = 0;
|
|
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
|
|
data = (data << 8) | *src++;
|
|
--cnt;
|
|
}
|
|
for (; i<4; ++i, ++cp) {
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
}
|
|
|
|
return (write_word(info, wp, data));
|
|
}
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Write a word to Flash, returns:
|
|
* 0 - OK
|
|
* 1 - write timeout
|
|
* 2 - Flash not erased
|
|
*/
|
|
static int write_word (flash_info_t *info, ulong dest, ulong data)
|
|
{
|
|
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0];
|
|
volatile FLASH_WORD_SIZE *dest2;
|
|
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
|
|
ulong start;
|
|
int flag;
|
|
int i;
|
|
unsigned char sh8b;
|
|
|
|
/* Check the ROM CS */
|
|
if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START)){
|
|
sh8b = 3;
|
|
}
|
|
else{
|
|
sh8b = 0;
|
|
}
|
|
|
|
dest2 = (FLASH_WORD_SIZE *)(((dest - info->start[0]) << sh8b) +
|
|
info->start[0]);
|
|
|
|
/* Check if Flash is (sufficiently) erased */
|
|
if ((*dest2 & (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
|
|
return (2);
|
|
}
|
|
/* Disable interrupts which might cause a timeout here */
|
|
flag = disable_interrupts();
|
|
|
|
for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++){
|
|
addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
|
|
addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
|
|
addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0;
|
|
|
|
dest2[i << sh8b] = data2[i];
|
|
|
|
/* re-enable interrupts if necessary */
|
|
if (flag){
|
|
enable_interrupts();
|
|
}
|
|
|
|
/* data polling for D7 */
|
|
start = get_timer (0);
|
|
while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) !=
|
|
(data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
|
|
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
|
|
return (1);
|
|
}
|
|
}
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*----------------------------------------------------------------------- */
|
|
|