upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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390 lines
11 KiB
390 lines
11 KiB
/*
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* Configuation settings for the Sentec Cobra Board.
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*
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* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* ---
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* Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
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* Date: 2004-03-29
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* Author: Florian Schlote
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*
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* For a description of configuration options please refer also to the
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* general u-boot-1.x.x/README file
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* ---
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*/
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/* ---
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* board/config.h - configuration options, board specific
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* ---
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*/
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#ifndef _CONFIG_COBRA5272_H
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#define _CONFIG_COBRA5272_H
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/* ---
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* Define processor
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* possible values for Sentec board: only Coldfire M5272 processor supported
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* (please do not change)
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* ---
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*/
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#define CONFIG_MCF52x2 /* define processor family */
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#define CONFIG_M5272 /* define processor type */
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/* ---
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* Defines processor clock - important for correct timings concerning serial
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* interface etc.
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* CFG_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
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* ---
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*/
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#define CFG_HZ 1000
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#define CFG_CLK 66000000
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#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
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/* ---
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* Enable use of Ethernet
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* ---
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*/
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#define CONFIG_MCFFEC
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/* Enable Dma Timer */
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#define CONFIG_MCFTMR
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/* ---
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* Define baudrate for UART1 (console output, tftp, ...)
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* default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
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* CFG_BAUDRATE_TABLE defines values that can be selected in u-boot command
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* interface
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* ---
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*/
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#define CONFIG_MCFUART
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#define CFG_UART_PORT (0)
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#define CONFIG_BAUDRATE 19200
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#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
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/* ---
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* set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
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* timeout acc. to your needs
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* #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
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* for 10 sec
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* ---
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*/
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#if 0
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#define CONFIG_WATCHDOG
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#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
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#endif
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/* ---
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* CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
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* bootloader residing in flash ('chainloading'); if you want to use
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* chainloading or want to compile a u-boot binary that can be loaded into
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* RAM via BDM set
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* "#if 0" to "#if 1"
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* You will need a first stage bootloader then, e. g. colilo or a working BDM
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* cable (Background Debug Mode)
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*
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* Setting #if 0: u-boot will start from flash and relocate itself to RAM
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*
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* Please do not forget to modify the setting of TEXT_BASE
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* in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
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*
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* ---
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*/
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#if 0
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#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
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#endif
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/* ---
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* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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* ---
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*/
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#ifndef CONFIG_MONITOR_IS_IN_RAM
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#define CFG_ENV_OFFSET 0x4000
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#define CFG_ENV_SECT_SIZE 0x2000
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_IS_EMBEDDED 1
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#else
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#define CFG_ENV_ADDR 0xffe04000
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#define CFG_ENV_SECT_SIZE 0x2000
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#define CFG_ENV_IS_IN_FLASH 1
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#endif
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_PING
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_LOADB
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#undef CONFIG_CMD_MII
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#ifdef CONFIG_MCFFEC
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# define CONFIG_NET_MULTI 1
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# define CONFIG_MII 1
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# define CFG_DISCOVER_PHY
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# define CFG_RX_ETH_BUFFER 8
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# define CFG_FAULT_ECHO_LINK_DOWN
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# define CFG_FEC0_PINMUX 0
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# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
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# define MCFFEC_TOUT_LOOP 50000
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/* If CFG_DISCOVER_PHY is not defined - hardcoded */
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# ifndef CFG_DISCOVER_PHY
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# define FECDUPLEX FULL
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# define FECSPEED _100BASET
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# else
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# ifndef CFG_FAULT_ECHO_LINK_DOWN
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# define CFG_FAULT_ECHO_LINK_DOWN
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# endif
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# endif /* CFG_DISCOVER_PHY */
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#endif
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/*
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*-----------------------------------------------------------------------------
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* Define user parameters that have to be customized most likely
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*-----------------------------------------------------------------------------
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*/
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/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
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#define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
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seconds u-boot will wait before starting defined (auto-)boot command, setting
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to -1 disables delay, setting to 0 will too prevent access to u-boot command
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interface: u-boot then has to reflashed */
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/* The following settings will be contained in the environment block ; if you
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want to use a neutral environment all those settings can be manually set in
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u-boot: 'set' command */
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#if 0
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#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
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enter a valid image address in flash */
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#define CONFIG_BOOTARGS " " /* default bootargs that are
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considered during boot */
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/* User network settings */
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#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */
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#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
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#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
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#endif
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#define CFG_PROMPT "COBRA > " /* Layout of u-boot prompt*/
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#define CFG_LOAD_ADDR 0x20000 /*Defines default RAM address
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from which user programs will be started */
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/*---*/
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#define CFG_LONGHELP /* undef to save memory */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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/*
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*-----------------------------------------------------------------------------
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* End of user parameters to be customized
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*-----------------------------------------------------------------------------
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*/
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/* ---
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* Defines memory range for test
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* ---
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*/
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#define CFG_MEMTEST_START 0x400
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#define CFG_MEMTEST_END 0x380000
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/* ---
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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* You should know what you are doing if you make changes here.
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* ---
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*/
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/* ---
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* Base register address
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* ---
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*/
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#define CFG_MBAR 0x10000000 /* Register Base Addrs */
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/* ---
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* System Conf. Reg. & System Protection Reg.
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* ---
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*/
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#define CFG_SCR 0x0003;
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#define CFG_SPR 0xffff;
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/* ---
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* Ethernet settings
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* ---
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*/
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#define CFG_DISCOVER_PHY
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#define CFG_ENET_BD_BASE 0x780000
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/*-----------------------------------------------------------------------
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* Definitions for initial stack pointer and data area (in internal SRAM)
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*/
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#define CFG_INIT_RAM_ADDR 0x20000000
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#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
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#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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/*-----------------------------------------------------------------------
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CFG_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SDRAM_BASE 0x00000000
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/*
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*-------------------------------------------------------------------------
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* RAM SIZE (is defined above)
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*-----------------------------------------------------------------------
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*/
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/* #define CFG_SDRAM_SIZE 16 */
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/*
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*-----------------------------------------------------------------------
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*/
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#define CFG_FLASH_BASE 0xffe00000
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#ifdef CONFIG_MONITOR_IS_IN_RAM
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#define CFG_MONITOR_BASE 0x20000
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#else
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#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
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#endif
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#define CFG_MONITOR_LEN 0x20000
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#define CFG_MALLOC_LEN (256 << 10)
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#define CFG_BOOTPARAMS_LEN 64*1024
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization ??
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*/
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 1000 /* flash timeout */
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define CFG_CACHELINE_SIZE 16
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/*-----------------------------------------------------------------------
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* Memory bank definitions
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*
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* Please refer also to Motorola Coldfire user manual - Chapter XXX
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* <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
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*/
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#define CFG_BR0_PRELIM 0xFFE00201
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#define CFG_OR0_PRELIM 0xFFE00014
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#define CFG_BR1_PRELIM 0
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#define CFG_OR1_PRELIM 0
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#define CFG_BR2_PRELIM 0
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#define CFG_OR2_PRELIM 0
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#define CFG_BR3_PRELIM 0
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#define CFG_OR3_PRELIM 0
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#define CFG_BR4_PRELIM 0
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#define CFG_OR4_PRELIM 0
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#define CFG_BR5_PRELIM 0
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#define CFG_OR5_PRELIM 0
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#define CFG_BR6_PRELIM 0
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#define CFG_OR6_PRELIM 0
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#define CFG_BR7_PRELIM 0x00000701
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#define CFG_OR7_PRELIM 0xFF00007C
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/*-----------------------------------------------------------------------
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* LED config
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*/
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#define LED_STAT_0 0xffff /*all LEDs off*/
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#define LED_STAT_1 0xfffe
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#define LED_STAT_2 0xfffd
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#define LED_STAT_3 0xfffb
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#define LED_STAT_4 0xfff7
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#define LED_STAT_5 0xffef
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#define LED_STAT_6 0xffdf
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#define LED_STAT_7 0xff00 /*all LEDs on*/
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/*-----------------------------------------------------------------------
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* Port configuration (GPIO)
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*/
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#define CFG_PACNT 0x00000000 /* PortA control reg.: All pins are external
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GPIO*/
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#define CFG_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
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(1^=output, 0^=input) */
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#define CFG_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
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#define CFG_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
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configuration */
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#define CFG_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
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#define CFG_PBDAT 0x0000 /* PortB value reg. */
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#define CFG_PDCNT 0x00000000 /* PortD control reg. */
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#endif /* _CONFIG_COBRA5272_H */
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