upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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141 lines
3.2 KiB
141 lines
3.2 KiB
/*
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* (C) Copyright 2002-2004
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* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <clps7111.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void clps7111_serial_setbrg(void)
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{
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unsigned int reg = 0;
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switch (gd->baudrate) {
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case 1200: reg = 191; break;
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case 9600: reg = 23; break;
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case 19200: reg = 11; break;
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case 38400: reg = 5; break;
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case 57600: reg = 3; break;
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case 115200: reg = 1; break;
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default: hang (); break;
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}
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/* init serial serial 1,2 */
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IO_SYSCON1 = SYSCON1_UART1EN;
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IO_SYSCON2 = SYSCON2_UART2EN;
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reg |= UBRLCR_WRDLEN8;
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IO_UBRLCR1 = reg;
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IO_UBRLCR2 = reg;
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}
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/*
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* Initialise the serial port with the given baudrate. The settings
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* are always 8 data bits, no parity, 1 stop bit, no start bits.
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*
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*/
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static int clps7111_serial_init(void)
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{
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serial_setbrg ();
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return (0);
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}
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/*
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* Output a single byte to the serial port.
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*/
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static void clps7111_serial_putc(const char c)
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{
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int tmo;
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/* If \n, also do \r */
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if (c == '\n')
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serial_putc ('\r');
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tmo = get_timer (0) + 1 * CONFIG_SYS_HZ;
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while (IO_SYSFLG1 & SYSFLG1_UTXFF)
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if (get_timer (0) > tmo)
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break;
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IO_UARTDR1 = c;
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}
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/*
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* Read a single byte from the serial port. Returns 1 on success, 0
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* otherwise. When the function is succesfull, the character read is
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* written into its argument c.
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*/
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static int clps7111_serial_tstc(void)
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{
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return !(IO_SYSFLG1 & SYSFLG1_URXFE);
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}
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/*
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* Read a single byte from the serial port. Returns 1 on success, 0
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* otherwise. When the function is succesfull, the character read is
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* written into its argument c.
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*/
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static int clps7111_serial_getc(void)
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{
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while (IO_SYSFLG1 & SYSFLG1_URXFE);
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return IO_UARTDR1 & 0xff;
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}
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static void clps7111_serial_puts(const char *s)
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{
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while (*s) {
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serial_putc (*s++);
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}
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}
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static struct serial_device clps7111_serial_drv = {
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.name = "clps7111_serial",
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.start = clps7111_serial_init,
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.stop = NULL,
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.setbrg = clps7111_serial_setbrg,
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.putc = clps7111_serial_putc,
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.puts = clps7111_serial_puts,
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.getc = clps7111_serial_getc,
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.tstc = clps7111_serial_tstc,
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};
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void clps7111_serial_initialize(void)
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{
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serial_register(&clps7111_serial_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &clps7111_serial_drv;
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}
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