upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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66 lines
2.6 KiB
66 lines
2.6 KiB
/*
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* Copyright (C) 2014 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/boot-device.h>
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#include <asm/arch/sg-regs.h>
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#include <asm/arch/sbc-regs.h>
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struct boot_device_info boot_device_table[] = {
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize 1MB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"},
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{BOOT_DEVICE_MMC1, "eMMC Boot (3.3V)"},
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{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
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{BOOT_DEVICE_NONE, "Reserved"},
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{BOOT_DEVICE_NONE, "Reserved"},
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{BOOT_DEVICE_NONE, "Reserved"},
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{BOOT_DEVICE_NONE, "Reserved"},
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{BOOT_DEVICE_NONE, "Reserved"},
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{BOOT_DEVICE_NONE, "Reserved"},
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{ /* sentinel */ }
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};
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int get_boot_mode_sel(void)
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{
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return (readl(SG_PINMON0) >> 1) & 0x1f;
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}
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u32 spl_boot_device(void)
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{
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int boot_mode;
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if (boot_is_swapped())
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return BOOT_DEVICE_NOR;
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boot_mode = get_boot_mode_sel();
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return boot_device_table[boot_mode].type;
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}
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