upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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347 lines
16 KiB
347 lines
16 KiB
/******************************************************************************
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*
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* Author: Xilinx, Inc.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*
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* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
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* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
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* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
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* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
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* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
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* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
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* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
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* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
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* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
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* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE.
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*
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*
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* Xilinx hardware products are not intended for use in life support
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* appliances, devices, or systems. Use in such applications is
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* expressly prohibited.
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*
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*
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* (c) Copyright 2002-2004 Xilinx Inc.
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* All rights reserved.
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*
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xstatus.h
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*
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* This file contains Xilinx software status codes. Status codes have their
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* own data type called XStatus. These codes are used throughout the Xilinx
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* device drivers.
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*
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******************************************************************************/
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#ifndef XSTATUS_H /* prevent circular inclusions */
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#define XSTATUS_H /* by using protection macros */
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/***************************** Include Files *********************************/
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#include "xbasic_types.h"
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/************************** Constant Definitions *****************************/
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/*********************** Common statuses 0 - 500 *****************************/
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#define XST_SUCCESS 0L
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#define XST_FAILURE 1L
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#define XST_DEVICE_NOT_FOUND 2L
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#define XST_DEVICE_BLOCK_NOT_FOUND 3L
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#define XST_INVALID_VERSION 4L
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#define XST_DEVICE_IS_STARTED 5L
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#define XST_DEVICE_IS_STOPPED 6L
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#define XST_FIFO_ERROR 7L /* an error occurred during an
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operation with a FIFO such as
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an underrun or overrun, this
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error requires the device to
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be reset */
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#define XST_RESET_ERROR 8L /* an error occurred which requires
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the device to be reset */
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#define XST_DMA_ERROR 9L /* a DMA error occurred, this error
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typically requires the device
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using the DMA to be reset */
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#define XST_NOT_POLLED 10L /* the device is not configured for
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polled mode operation */
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#define XST_FIFO_NO_ROOM 11L /* a FIFO did not have room to put
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the specified data into */
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#define XST_BUFFER_TOO_SMALL 12L /* the buffer is not large enough
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to hold the expected data */
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#define XST_NO_DATA 13L /* there was no data available */
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#define XST_REGISTER_ERROR 14L /* a register did not contain the
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expected value */
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#define XST_INVALID_PARAM 15L /* an invalid parameter was passed
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into the function */
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#define XST_NOT_SGDMA 16L /* the device is not configured for
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scatter-gather DMA operation */
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#define XST_LOOPBACK_ERROR 17L /* a loopback test failed */
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#define XST_NO_CALLBACK 18L /* a callback has not yet been
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* registered */
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#define XST_NO_FEATURE 19L /* device is not configured with
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* the requested feature */
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#define XST_NOT_INTERRUPT 20L /* device is not configured for
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* interrupt mode operation */
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#define XST_DEVICE_BUSY 21L /* device is busy */
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#define XST_ERROR_COUNT_MAX 22L /* the error counters of a device
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* have maxed out */
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#define XST_IS_STARTED 23L /* used when part of device is
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* already started i.e.
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* sub channel */
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#define XST_IS_STOPPED 24L /* used when part of device is
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* already stopped i.e.
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* sub channel */
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/***************** Utility Component statuses 401 - 500 *********************/
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#define XST_MEMTEST_FAILED 401L /* memory test failed */
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/***************** Common Components statuses 501 - 1000 *********************/
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/********************* Packet Fifo statuses 501 - 510 ************************/
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#define XST_PFIFO_LACK_OF_DATA 501L /* not enough data in FIFO */
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#define XST_PFIFO_NO_ROOM 502L /* not enough room in FIFO */
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#define XST_PFIFO_BAD_REG_VALUE 503L /* self test, a register value
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was invalid after reset */
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/************************** DMA statuses 511 - 530 ***************************/
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#define XST_DMA_TRANSFER_ERROR 511L /* self test, DMA transfer
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failed */
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#define XST_DMA_RESET_REGISTER_ERROR 512L /* self test, a register value
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was invalid after reset */
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#define XST_DMA_SG_LIST_EMPTY 513L /* scatter gather list contains
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no buffer descriptors ready
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to be processed */
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#define XST_DMA_SG_IS_STARTED 514L /* scatter gather not stopped */
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#define XST_DMA_SG_IS_STOPPED 515L /* scatter gather not running */
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#define XST_DMA_SG_LIST_FULL 517L /* all the buffer desciptors of
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the scatter gather list are
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being used */
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#define XST_DMA_SG_BD_LOCKED 518L /* the scatter gather buffer
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descriptor which is to be
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copied over in the scatter
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list is locked */
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#define XST_DMA_SG_NOTHING_TO_COMMIT 519L /* no buffer descriptors have been
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put into the scatter gather
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list to be commited */
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#define XST_DMA_SG_COUNT_EXCEEDED 521L /* the packet count threshold
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specified was larger than the
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total # of buffer descriptors
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in the scatter gather list */
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#define XST_DMA_SG_LIST_EXISTS 522L /* the scatter gather list has
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already been created */
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#define XST_DMA_SG_NO_LIST 523L /* no scatter gather list has
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been created */
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#define XST_DMA_SG_BD_NOT_COMMITTED 524L /* the buffer descriptor which was
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being started was not committed
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to the list */
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#define XST_DMA_SG_NO_DATA 525L /* the buffer descriptor to start
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has already been used by the
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hardware so it can't be reused
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*/
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/************************** IPIF statuses 531 - 550 ***************************/
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#define XST_IPIF_REG_WIDTH_ERROR 531L /* an invalid register width
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was passed into the function */
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#define XST_IPIF_RESET_REGISTER_ERROR 532L /* the value of a register at
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reset was not valid */
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#define XST_IPIF_DEVICE_STATUS_ERROR 533L /* a write to the device interrupt
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status register did not read
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back correctly */
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#define XST_IPIF_DEVICE_ACK_ERROR 534L /* the device interrupt status
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register did not reset when
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acked */
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#define XST_IPIF_DEVICE_ENABLE_ERROR 535L /* the device interrupt enable
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register was not updated when
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other registers changed */
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#define XST_IPIF_IP_STATUS_ERROR 536L /* a write to the IP interrupt
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status register did not read
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back correctly */
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#define XST_IPIF_IP_ACK_ERROR 537L /* the IP interrupt status register
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did not reset when acked */
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#define XST_IPIF_IP_ENABLE_ERROR 538L /* IP interrupt enable register was
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not updated correctly when other
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registers changed */
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#define XST_IPIF_DEVICE_PENDING_ERROR 539L /* The device interrupt pending
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register did not indicate the
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expected value */
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#define XST_IPIF_DEVICE_ID_ERROR 540L /* The device interrupt ID register
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did not indicate the expected
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value */
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/****************** Device specific statuses 1001 - 4095 *********************/
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/********************* Ethernet statuses 1001 - 1050 *************************/
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#define XST_EMAC_MEMORY_SIZE_ERROR 1001L /* Memory space is not big enough
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* to hold the minimum number of
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* buffers or descriptors */
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#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L /* Memory allocation failed */
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#define XST_EMAC_MII_READ_ERROR 1003L /* MII read error */
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#define XST_EMAC_MII_BUSY 1004L /* An MII operation is in progress */
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#define XST_EMAC_OUT_OF_BUFFERS 1005L /* Adapter is out of buffers */
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#define XST_EMAC_PARSE_ERROR 1006L /* Invalid adapter init string */
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#define XST_EMAC_COLLISION_ERROR 1007L /* Excess deferral or late
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* collision on polled send */
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/*********************** UART statuses 1051 - 1075 ***************************/
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#define XST_UART
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#define XST_UART_INIT_ERROR 1051L
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#define XST_UART_START_ERROR 1052L
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#define XST_UART_CONFIG_ERROR 1053L
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#define XST_UART_TEST_FAIL 1054L
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#define XST_UART_BAUD_ERROR 1055L
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#define XST_UART_BAUD_RANGE 1056L
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/************************ IIC statuses 1076 - 1100 ***************************/
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#define XST_IIC_SELFTEST_FAILED 1076 /* self test failed */
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#define XST_IIC_BUS_BUSY 1077 /* bus found busy */
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#define XST_IIC_GENERAL_CALL_ADDRESS 1078 /* mastersend attempted with */
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/* general call address */
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#define XST_IIC_STAND_REG_RESET_ERROR 1079 /* A non parameterizable reg */
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/* value after reset not valid */
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#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080 /* Tx fifo included in design */
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/* value after reset not valid */
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#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081 /* Rx fifo included in design */
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/* value after reset not valid */
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#define XST_IIC_TBA_REG_RESET_ERROR 1082 /* 10 bit addr incl in design */
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/* value after reset not valid */
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#define XST_IIC_CR_READBACK_ERROR 1083 /* Read of the control register */
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/* didn't return value written */
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#define XST_IIC_DTR_READBACK_ERROR 1084 /* Read of the data Tx reg */
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/* didn't return value written */
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#define XST_IIC_DRR_READBACK_ERROR 1085 /* Read of the data Receive reg */
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/* didn't return value written */
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#define XST_IIC_ADR_READBACK_ERROR 1086 /* Read of the data Tx reg */
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/* didn't return value written */
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#define XST_IIC_TBA_READBACK_ERROR 1087 /* Read of the 10 bit addr reg */
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/* didn't return written value */
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#define XST_IIC_NOT_SLAVE 1088 /* The device isn't a slave */
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/*********************** ATMC statuses 1101 - 1125 ***************************/
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#define XST_ATMC_ERROR_COUNT_MAX 1101L /* the error counters in the ATM
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controller hit the max value
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which requires the statistics
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to be cleared */
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/*********************** Flash statuses 1126 - 1150 **************************/
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#define XST_FLASH_BUSY 1126L /* Flash is erasing or programming */
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#define XST_FLASH_READY 1127L /* Flash is ready for commands */
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#define XST_FLASH_ERROR 1128L /* Flash had detected an internal
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error. Use XFlash_DeviceControl
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to retrieve device specific codes */
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#define XST_FLASH_ERASE_SUSPENDED 1129L /* Flash is in suspended erase state */
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#define XST_FLASH_WRITE_SUSPENDED 1130L /* Flash is in suspended write state */
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#define XST_FLASH_PART_NOT_SUPPORTED 1131L /* Flash type not supported by
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driver */
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#define XST_FLASH_NOT_SUPPORTED 1132L /* Operation not supported */
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#define XST_FLASH_TOO_MANY_REGIONS 1133L /* Too many erase regions */
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#define XST_FLASH_TIMEOUT_ERROR 1134L /* Programming or erase operation
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aborted due to a timeout */
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#define XST_FLASH_ADDRESS_ERROR 1135L /* Accessed flash outside its
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addressible range */
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#define XST_FLASH_ALIGNMENT_ERROR 1136L /* Write alignment error */
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#define XST_FLASH_BLOCKING_CALL_ERROR 1137L /* Couldn't return immediately from
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write/erase function with
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XFL_NON_BLOCKING_WRITE/ERASE
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option cleared */
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#define XST_FLASH_CFI_QUERY_ERROR 1138L /* Failed to query the device */
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/*********************** SPI statuses 1151 - 1175 ****************************/
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#define XST_SPI_MODE_FAULT 1151 /* master was selected as slave */
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#define XST_SPI_TRANSFER_DONE 1152 /* data transfer is complete */
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#define XST_SPI_TRANSMIT_UNDERRUN 1153 /* slave underruns transmit register */
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#define XST_SPI_RECEIVE_OVERRUN 1154 /* device overruns receive register */
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#define XST_SPI_NO_SLAVE 1155 /* no slave has been selected yet */
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#define XST_SPI_TOO_MANY_SLAVES 1156 /* more than one slave is being
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* selected */
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#define XST_SPI_NOT_MASTER 1157 /* operation is valid only as master */
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#define XST_SPI_SLAVE_ONLY 1158 /* device is configured as slave-only */
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#define XST_SPI_SLAVE_MODE_FAULT 1159 /* slave was selected while disabled */
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/********************** OPB Arbiter statuses 1176 - 1200 *********************/
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#define XST_OPBARB_INVALID_PRIORITY 1176 /* the priority registers have either
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* one master assigned to two or more
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* priorities, or one master not
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* assigned to any priority
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*/
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#define XST_OPBARB_NOT_SUSPENDED 1177 /* an attempt was made to modify the
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* priority levels without first
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* suspending the use of priority
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* levels
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*/
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#define XST_OPBARB_PARK_NOT_ENABLED 1178 /* bus parking by id was enabled but
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* bus parking was not enabled
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*/
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#define XST_OPBARB_NOT_FIXED_PRIORITY 1179 /* the arbiter must be in fixed
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* priority mode to allow the
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* priorities to be changed
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*/
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/************************ Intc statuses 1201 - 1225 **************************/
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#define XST_INTC_FAIL_SELFTEST 1201 /* self test failed */
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#define XST_INTC_CONNECT_ERROR 1202 /* interrupt already in use */
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/********************** TmrCtr statuses 1226 - 1250 **************************/
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#define XST_TMRCTR_TIMER_FAILED 1226 /* self test failed */
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/********************** WdtTb statuses 1251 - 1275 ***************************/
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#define XST_WDTTB_TIMER_FAILED 1251L
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/********************** PlbArb statuses 1276 - 1300 **************************/
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#define XST_PLBARB_FAIL_SELFTEST 1276L
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/********************** Plb2Opb statuses 1301 - 1325 *************************/
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#define XST_PLB2OPB_FAIL_SELFTEST 1301L
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/********************** Opb2Plb statuses 1326 - 1350 *************************/
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#define XST_OPB2PLB_FAIL_SELFTEST 1326L
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/********************** SysAce statuses 1351 - 1360 **************************/
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#define XST_SYSACE_NO_LOCK 1351L /* No MPU lock has been granted */
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/********************** PCI Bridge statuses 1361 - 1375 **********************/
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#define XST_PCI_INVALID_ADDRESS 1361L
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/**************************** Type Definitions *******************************/
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/**
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* The status typedef.
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*/
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typedef u32 XStatus;
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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#endif /* end of protection macro */
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