upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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118 lines
3.0 KiB
118 lines
3.0 KiB
/*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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#include <asm/arch/omap.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/omap_common.h>
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#include <asm/arch/clock.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct pad_conf_entry {
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u32 offset;
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u32 val;
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};
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struct omap_sysinfo {
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char *board_string;
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};
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extern const struct omap_sysinfo sysinfo;
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void gpmc_init(void);
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void watchdog_init(void);
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u32 get_device_type(void);
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void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
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void set_muxconf_regs_essential(void);
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void set_muxconf_regs_non_essential(void);
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void sr32(void *, u32, u32, u32);
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u32 wait_on_value(u32, u32, void *, u32);
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void sdelay(unsigned long);
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void setup_clocks_for_console(void);
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void prcm_init(void);
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void bypass_dpll(u32 const base);
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void freq_update_core(void);
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u32 get_sys_clk_freq(void);
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u32 omap5_ddr_clk(void);
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void cancel_out(u32 *num, u32 *den, u32 den_limit);
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void sdram_init(void);
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u32 omap_sdram_size(void);
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u32 cortex_rev(void);
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void save_omap_boot_params(void);
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void init_omap_revision(void);
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void do_io_settings(void);
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void sri2c_init(void);
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void gpi2c_init(void);
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int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
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u32 warm_reset(void);
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void force_emif_self_refresh(void);
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void get_ioregs(const struct ctrl_ioregs **regs);
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void srcomp_enable(void);
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void setup_warmreset_time(void);
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static inline u32 running_from_sdram(void)
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{
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u32 pc;
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asm volatile ("mov %0, pc" : "=r" (pc));
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return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) &&
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(pc < OMAP54XX_DRAM_ADDR_SPACE_END));
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}
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static inline u8 uboot_loaded_by_spl(void)
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{
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/*
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* u-boot can be running from sdram either because of configuration
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* Header or by SPL. If because of CH, then the romcode sets the
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* CHSETTINGS executed bit to true in the boot parameter structure that
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* it passes to the bootloader.This parameter is stored in the ch_flags
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* variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
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* mandatory section if CH is present.
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*/
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if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
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return 0;
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else
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return running_from_sdram();
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}
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/*
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* The basic hardware init of OMAP(s_init()) can happen in 4
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* different contexts:
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* 1. SPL running from SRAM
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* 2. U-Boot running from FLASH
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* 3. Non-XIP U-Boot loaded to SDRAM by SPL
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* 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
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* Configuration Header feature
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*
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* This function finds this context.
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* Defining as inline may help in compiling out unused functions in SPL
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*/
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static inline u32 omap_hw_init_context(void)
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{
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#ifdef CONFIG_SPL_BUILD
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return OMAP_INIT_CONTEXT_SPL;
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#else
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if (uboot_loaded_by_spl())
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return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
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else if (running_from_sdram())
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return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
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else
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return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
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#endif
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}
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static inline u32 div_round_up(u32 num, u32 den)
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{
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return (num + den - 1)/den;
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}
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static inline u32 usec_to_32k(u32 usec)
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{
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return div_round_up(32768 * usec, 1000000);
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}
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#endif
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