upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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67 lines
1.8 KiB
67 lines
1.8 KiB
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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config INTEL_QUEENSBAY
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bool
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select HAVE_FSP
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select HAVE_CMC
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select ARCH_EARLY_INIT_R
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imply AHCI_PCI
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imply ICH_SPI
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imply INTEL_ICH6_GPIO
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imply MMC
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imply MMC_PCI
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imply MMC_SDHCI
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imply MMC_SDHCI_SDMA
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imply PCH_GBE
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imply SCSI
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imply SCSI_AHCI
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imply SPI_FLASH
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imply SYS_NS16550
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imply USB
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imply USB_EHCI_HCD
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imply VIDEO_VESA
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if INTEL_QUEENSBAY
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config HAVE_CMC
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bool "Add a Chipset Micro Code state machine binary"
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help
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Select this option to add a Chipset Micro Code state machine binary
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to the resulting U-Boot image. It is a 64K data block of machine
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specific code which must be put in the flash for the processor to
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access when powered up before system BIOS is executed.
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config CMC_FILE
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string "Chipset Micro Code state machine filename"
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depends on HAVE_CMC
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default "cmc.bin"
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help
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The filename of the file to use as Chipset Micro Code state machine
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binary in the board directory.
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config CMC_ADDR
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hex "Chipset Micro Code state machine binary location"
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depends on HAVE_CMC
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default 0xfffb0000
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help
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The location of the CMC binary is determined by a strap. It must be
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put in flash at a location matching the strap-determined base address.
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The default base address of 0xfffb0000 indicates that the binary must
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be located at offset 0xb0000 from the beginning of a 1MB flash device.
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config CPU_ADDR_BITS
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int
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default 32
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config DISABLE_IGD
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bool "Disable Integrated Graphics Device (IGD)"
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help
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Disable the Integrated Graphics Device (IGD) so that it does not
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show in the PCI configuration space as a VGA disaplay controller.
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This gives a chance for U-Boot to run PCI/PCIe based graphics
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card's VGA BIOS and use that card for the graphics console.
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endif
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